JPS57111739A - Read-only memory correction system - Google Patents
Read-only memory correction systemInfo
- Publication number
- JPS57111739A JPS57111739A JP18708880A JP18708880A JPS57111739A JP S57111739 A JPS57111739 A JP S57111739A JP 18708880 A JP18708880 A JP 18708880A JP 18708880 A JP18708880 A JP 18708880A JP S57111739 A JPS57111739 A JP S57111739A
- Authority
- JP
- Japan
- Prior art keywords
- address
- rom
- step group
- written
- sub
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Read Only Memory (AREA)
- Executing Machine-Instructions (AREA)
- Debugging And Monitoring (AREA)
Abstract
PURPOSE:To correct an ROM economically and quickly, by writing a corrected step group in an idle area of the ROM, and writing a corresponding address of the corrected step group in an address table, when correcting a step group of the ROM. CONSTITUTION:A main program of an ROM is split, and to areas AP1-AP3, step groups P1-P3 are written, respectively. Corresponding to each step, presteps PP1-PP3 having a discrimination number, and an instruction for jumping to a subroutine SUB are written in areas ADP1-ADP3. A return address from the SUB is stored in an RAM. When it has been detected that the step group P2 requires a correction, a corrected step group P2-C is written in an idle area AP2-C of the ROM, an address of AP2-C is written on an area corresponding to the step group P2 of an address table ADT, and it is jumped to this address by the SUB. Accordingly, the CPU accesses the head address of AP2-C, and executes the program by a correct step group.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18708880A JPS57111739A (en) | 1980-12-29 | 1980-12-29 | Read-only memory correction system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18708880A JPS57111739A (en) | 1980-12-29 | 1980-12-29 | Read-only memory correction system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57111739A true JPS57111739A (en) | 1982-07-12 |
Family
ID=16199897
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18708880A Pending JPS57111739A (en) | 1980-12-29 | 1980-12-29 | Read-only memory correction system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57111739A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6318441A (en) * | 1986-07-09 | 1988-01-26 | Natl Space Dev Agency Japan<Nasda> | On-board computer for space-flying body |
JPS6318440A (en) * | 1986-07-09 | 1988-01-26 | Natl Space Dev Agency Japan<Nasda> | On-board computer for space-flying body |
JPH02211529A (en) * | 1989-02-13 | 1990-08-22 | Hitachi Ltd | Data processor |
-
1980
- 1980-12-29 JP JP18708880A patent/JPS57111739A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6318441A (en) * | 1986-07-09 | 1988-01-26 | Natl Space Dev Agency Japan<Nasda> | On-board computer for space-flying body |
JPS6318440A (en) * | 1986-07-09 | 1988-01-26 | Natl Space Dev Agency Japan<Nasda> | On-board computer for space-flying body |
JPH02211529A (en) * | 1989-02-13 | 1990-08-22 | Hitachi Ltd | Data processor |
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