JPS57111718A - Monitoring system for common bus - Google Patents

Monitoring system for common bus

Info

Publication number
JPS57111718A
JPS57111718A JP55187789A JP18778980A JPS57111718A JP S57111718 A JPS57111718 A JP S57111718A JP 55187789 A JP55187789 A JP 55187789A JP 18778980 A JP18778980 A JP 18778980A JP S57111718 A JPS57111718 A JP S57111718A
Authority
JP
Japan
Prior art keywords
common bus
line
cpu2
state
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55187789A
Other languages
Japanese (ja)
Other versions
JPS6041383B2 (en
Inventor
Hidekiyo Ozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55187789A priority Critical patent/JPS6041383B2/en
Publication of JPS57111718A publication Critical patent/JPS57111718A/en
Publication of JPS6041383B2 publication Critical patent/JPS6041383B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To facilitate resetting a processing device, by monitoring the signal change on a prescribed signal line of a common bus to record the state of the bus for every change and by freezing the state recording when the signal change is not detected over a constant time. CONSTITUTION:A processing device CPU2, a bus monitoring device 3, a main storage device 4, and an input/output device 5 are connected to a common bus 1, and devices 2-5 communicate mutually through the common bus 1. Devices 2 and 3 are connected by a reinitial load indication line l1, a line l2 indicating the stop state, a line l3 indicating the check stop state, and a line l4 indicating the waiting state. The start and the end of an access on the common bus 1 are monitored by the device 3, and states at these time points are recorded; and if no change is detected over a constant time when the CPU2 is not in the stop state, the state recording of the common bus 1 is frozen, and the CPU2 is reset. By this operation, a processing program is loaded again from the external to the CPU2.
JP55187789A 1980-12-29 1980-12-29 Common bus monitoring method Expired JPS6041383B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55187789A JPS6041383B2 (en) 1980-12-29 1980-12-29 Common bus monitoring method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55187789A JPS6041383B2 (en) 1980-12-29 1980-12-29 Common bus monitoring method

Publications (2)

Publication Number Publication Date
JPS57111718A true JPS57111718A (en) 1982-07-12
JPS6041383B2 JPS6041383B2 (en) 1985-09-17

Family

ID=16212244

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55187789A Expired JPS6041383B2 (en) 1980-12-29 1980-12-29 Common bus monitoring method

Country Status (1)

Country Link
JP (1) JPS6041383B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03216740A (en) * 1990-01-22 1991-09-24 Nec Corp Microcomputer development support device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03216740A (en) * 1990-01-22 1991-09-24 Nec Corp Microcomputer development support device
JP2626119B2 (en) * 1990-01-22 1997-07-02 日本電気株式会社 Microcomputer development support equipment

Also Published As

Publication number Publication date
JPS6041383B2 (en) 1985-09-17

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