JPS5710833A - Communication controlling system - Google Patents

Communication controlling system

Info

Publication number
JPS5710833A
JPS5710833A JP8534880A JP8534880A JPS5710833A JP S5710833 A JPS5710833 A JP S5710833A JP 8534880 A JP8534880 A JP 8534880A JP 8534880 A JP8534880 A JP 8534880A JP S5710833 A JPS5710833 A JP S5710833A
Authority
JP
Japan
Prior art keywords
incoming
communication controller
character
interruption
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8534880A
Other languages
Japanese (ja)
Other versions
JPS5953574B2 (en
Inventor
Yasuhiro Nakahara
Hiroo Mizuguchi
Yukinori Inoue
Toshiyuki Odakawa
Kanji Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55085348A priority Critical patent/JPS5953574B2/en
Publication of JPS5710833A publication Critical patent/JPS5710833A/en
Publication of JPS5953574B2 publication Critical patent/JPS5953574B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer And Data Communications (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To reduce an interruption to a processor by constituting so that a communication controller sends an incoming reject signal autonomously, in a station system which is equipped with the processing device and the communication controller. CONSTITUTION:A central processing equipment 4 sets to a transmitting buffer 6 an incoming receive signal (ACK) character in case when incoming is possible, and an incoming reject signal (NAK) character in case when incoming is impossible, in order to cope with an outgoing sequence from other terminal. A communication controller 3 reads out a response character of the transmitting buffer 6 and sends the response character to a circuit, and when an incoming reject signal is ready in the communication controller 3, it sends the incoming reject signal autonomously without giving an interruption to a processor 4 at every incoming, and when an incoming receive signal is ready, an interruption is given to the processor after the incoming receive signal has been sent.
JP55085348A 1980-06-24 1980-06-24 Communication control method Expired JPS5953574B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55085348A JPS5953574B2 (en) 1980-06-24 1980-06-24 Communication control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55085348A JPS5953574B2 (en) 1980-06-24 1980-06-24 Communication control method

Publications (2)

Publication Number Publication Date
JPS5710833A true JPS5710833A (en) 1982-01-20
JPS5953574B2 JPS5953574B2 (en) 1984-12-26

Family

ID=13856161

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55085348A Expired JPS5953574B2 (en) 1980-06-24 1980-06-24 Communication control method

Country Status (1)

Country Link
JP (1) JPS5953574B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60230749A (en) * 1984-04-28 1985-11-16 Fujitsu Ltd Response controlling system of circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60230749A (en) * 1984-04-28 1985-11-16 Fujitsu Ltd Response controlling system of circuit

Also Published As

Publication number Publication date
JPS5953574B2 (en) 1984-12-26

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