JPS57106067A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS57106067A JPS57106067A JP55182336A JP18233680A JPS57106067A JP S57106067 A JPS57106067 A JP S57106067A JP 55182336 A JP55182336 A JP 55182336A JP 18233680 A JP18233680 A JP 18233680A JP S57106067 A JPS57106067 A JP S57106067A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- polycrystalline
- self
- film
- films
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 4
- 229910052785 arsenic Inorganic materials 0.000 abstract 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 239000011521 glass Substances 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- 230000010354 integration Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 150000004767 nitrides Chemical class 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Local Oxidation Of Silicon (AREA)
- Bipolar Transistors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
PURPOSE:To enable to obtain a semiconductor device having high integration and superior characteristic by a method wherein openings for lead out of electrode are formed by self-alignment making minute oxide films formed at the circumference of a polycrystalline Si pattern as the mask. CONSTITUTION:An Si nitride film 109, a glass film 110 being added with arsenic (AsSG) are piled up in order on the whole surface of an Si substrate 101 being formed with a p type inside base region 107 and an injector region 108. The films 110, 109 are removed selectively to form an opening part 112. An undoped polycrystalline Si film 113 is piled up on the whole surface. Heat treatment is performed to make As to be diffused from the AsSG film pattern 111 to form As doped regions 113'. Etching treatment is performed to form opening parts 112 and a polycrystalline Si pattern by self-alignment in the pattern 111, and moreover As is added to form n<+> type polycrystalline Si patterns 1141, 1142. Thermal oxidation treatment is performed to form thermal oxide films 1151, 1152 arround the patterns 1141, 1142. Then openings 1171-1174 are formed by self-alignment making the films 1151, 1152 as the mask.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55182336A JPS57106067A (en) | 1980-12-23 | 1980-12-23 | Manufacture of semiconductor device |
| EP19810101993 EP0036620B1 (en) | 1980-03-22 | 1981-03-17 | Semiconductor device and method for fabricating the same |
| DE8181101993T DE3160917D1 (en) | 1980-03-22 | 1981-03-17 | Semiconductor device and method for fabricating the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55182336A JPS57106067A (en) | 1980-12-23 | 1980-12-23 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57106067A true JPS57106067A (en) | 1982-07-01 |
Family
ID=16116521
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55182336A Pending JPS57106067A (en) | 1980-03-22 | 1980-12-23 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57106067A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54154272A (en) * | 1978-05-26 | 1979-12-05 | Matsushita Electric Ind Co Ltd | Contact forming method for semiconductor device |
-
1980
- 1980-12-23 JP JP55182336A patent/JPS57106067A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54154272A (en) * | 1978-05-26 | 1979-12-05 | Matsushita Electric Ind Co Ltd | Contact forming method for semiconductor device |
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