JPS57101488A - Data transfer system - Google Patents
Data transfer systemInfo
- Publication number
- JPS57101488A JPS57101488A JP17754780A JP17754780A JPS57101488A JP S57101488 A JPS57101488 A JP S57101488A JP 17754780 A JP17754780 A JP 17754780A JP 17754780 A JP17754780 A JP 17754780A JP S57101488 A JPS57101488 A JP S57101488A
- Authority
- JP
- Japan
- Prior art keywords
- information
- flag
- processor
- frame
- data transfer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M11/00—Telephonic communication systems specially adapted for combination with other electrical systems
- H04M11/06—Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Exchange Systems With Centralized Control (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Abstract
PURPOSE:To perform information processing efficiently and surely, by using a part of specific channel as a flag to possess indicating function of information, in the data transfer between a distribution stage processor using a PCM line and a terminal controller. CONSTITUTION:Information transmission/reception between a distribution stage NW call processor CPR making exchange of call and a line processor LPR of terminals LC, RLC is made via PCM lines l0, l1, and 16Ts of one multi-frame consisting of 32 time slots (Ts) is used. A frame F0 of information group CB of 16Ts is taken for MFAS for synchronism and the first 2-bit of the frame F1 is used as a flag. This flag takes a tri-state as functions; information is during transmission, information is transmitted, and information if the same as the previous one or not. A processor CPR at the reception side monitors the flag of written information in a memory and processes after discriminating read-in is enable, read-in is required or not required.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17754780A JPS57101488A (en) | 1980-12-16 | 1980-12-16 | Data transfer system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17754780A JPS57101488A (en) | 1980-12-16 | 1980-12-16 | Data transfer system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57101488A true JPS57101488A (en) | 1982-06-24 |
JPS632194B2 JPS632194B2 (en) | 1988-01-18 |
Family
ID=16032849
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17754780A Granted JPS57101488A (en) | 1980-12-16 | 1980-12-16 | Data transfer system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57101488A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62208794A (en) * | 1986-03-06 | 1987-09-14 | Fujitsu Ltd | Data transfer system inter-processors |
JPH0193289A (en) * | 1987-10-05 | 1989-04-12 | Hitachi Ltd | Remote exchange system |
-
1980
- 1980-12-16 JP JP17754780A patent/JPS57101488A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62208794A (en) * | 1986-03-06 | 1987-09-14 | Fujitsu Ltd | Data transfer system inter-processors |
JPH0193289A (en) * | 1987-10-05 | 1989-04-12 | Hitachi Ltd | Remote exchange system |
Also Published As
Publication number | Publication date |
---|---|
JPS632194B2 (en) | 1988-01-18 |
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