JPS57101456A - Test system for communication control processor - Google Patents

Test system for communication control processor

Info

Publication number
JPS57101456A
JPS57101456A JP55177647A JP17764780A JPS57101456A JP S57101456 A JPS57101456 A JP S57101456A JP 55177647 A JP55177647 A JP 55177647A JP 17764780 A JP17764780 A JP 17764780A JP S57101456 A JPS57101456 A JP S57101456A
Authority
JP
Japan
Prior art keywords
signal
circuit
dial
conversion circuit
transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55177647A
Other languages
Japanese (ja)
Inventor
Akito Hiwatari
Akio Hanazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55177647A priority Critical patent/JPS57101456A/en
Publication of JPS57101456A publication Critical patent/JPS57101456A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/50—Testing arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

PURPOSE:To achieve operation test for a dial information transmission circuit, by using a data transmission/reception circuit, through the addition of a simple signal conversion circuit to a communication control processor. CONSTITUTION:A dial information transmitting circuit 5 and a data transmission/reception circuit 6 are connected via a signal conversion circuit 9 and a test program is started. Initial state is set with a test program and correspondence of each signal is sequentially made. When a succeeding numeral request signal PND is set, the dial information transmitting circuit 5 turns on a numeral display signal DPR and sets numerals DS1-DS8 of the 1st digit of the dial number to be transmitted for transmission. The signal conversion circuit 9 sets the dial signal to a parallel serial conversion circuit PSC by turning on the DPR. The signal conversion circuit 9 transmits the set data in synchronizing with a transmission timing signal ST1, when the DPR turns off, and it is received at a data transmission/reception circuit 6 as a data RD. The test program checks the dial signal.
JP55177647A 1980-12-16 1980-12-16 Test system for communication control processor Pending JPS57101456A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55177647A JPS57101456A (en) 1980-12-16 1980-12-16 Test system for communication control processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55177647A JPS57101456A (en) 1980-12-16 1980-12-16 Test system for communication control processor

Publications (1)

Publication Number Publication Date
JPS57101456A true JPS57101456A (en) 1982-06-24

Family

ID=16034642

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55177647A Pending JPS57101456A (en) 1980-12-16 1980-12-16 Test system for communication control processor

Country Status (1)

Country Link
JP (1) JPS57101456A (en)

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