JPS5694888A - Phase servo circuit - Google Patents

Phase servo circuit

Info

Publication number
JPS5694888A
JPS5694888A JP17303779A JP17303779A JPS5694888A JP S5694888 A JPS5694888 A JP S5694888A JP 17303779 A JP17303779 A JP 17303779A JP 17303779 A JP17303779 A JP 17303779A JP S5694888 A JPS5694888 A JP S5694888A
Authority
JP
Japan
Prior art keywords
phase
speed
error
amplifier
servo circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17303779A
Other languages
Japanese (ja)
Other versions
JPS6358431B2 (en
Inventor
Kenji Nakano
Tadahiko Nakamura
Masaaki Sakai
Mitsutoshi Magai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP17303779A priority Critical patent/JPS5694888A/en
Publication of JPS5694888A publication Critical patent/JPS5694888A/en
Publication of JPS6358431B2 publication Critical patent/JPS6358431B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To limit the reproduction horizontal synchronous frequency within the clock range of the horizontal AFC of a monitor TV, by counting the phase difference between the reference signal and the pulse according to the rotary phase of a rotary magnetic head by the prescribed clock and then controlling the phase of the magnetic head by the count value of the phase difference.
CONSTITUTION: The pulse duration modulating signal PSPWM is delivered from the drum speed servo circuit 1 in accordance with the speed error and then supplied to the servo amplifier 4 via the LPF8. At the same time, the pulse duration modulating signal DPPWM is delivered from the phase servo circuit 2 in accordance with the phase error to be supplied to the amplifier 4 via the LPF9. The speed error is added with the phase error at the amplifier 4, and the drum motor 5 is controlled by the output of addition. Then the high-speed reproduction mode switch signal K is applid to the circuit 2 in the high-speed reproductio mode of the cue, review and the like. Thus the reproduction horizontal synchronous frequency can be limited within the lock range of the horizontal AFC of a monitor TV.
COPYRIGHT: (C)1981,JPO&Japio
JP17303779A 1979-12-27 1979-12-27 Phase servo circuit Granted JPS5694888A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17303779A JPS5694888A (en) 1979-12-27 1979-12-27 Phase servo circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17303779A JPS5694888A (en) 1979-12-27 1979-12-27 Phase servo circuit

Publications (2)

Publication Number Publication Date
JPS5694888A true JPS5694888A (en) 1981-07-31
JPS6358431B2 JPS6358431B2 (en) 1988-11-15

Family

ID=15953023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17303779A Granted JPS5694888A (en) 1979-12-27 1979-12-27 Phase servo circuit

Country Status (1)

Country Link
JP (1) JPS5694888A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0515406U (en) * 1991-08-06 1993-02-26 アルプス電気株式会社 Slide operation type electric parts

Also Published As

Publication number Publication date
JPS6358431B2 (en) 1988-11-15

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