JPS5694875A - Binary signal processor - Google Patents

Binary signal processor

Info

Publication number
JPS5694875A
JPS5694875A JP17189279A JP17189279A JPS5694875A JP S5694875 A JPS5694875 A JP S5694875A JP 17189279 A JP17189279 A JP 17189279A JP 17189279 A JP17189279 A JP 17189279A JP S5694875 A JPS5694875 A JP S5694875A
Authority
JP
Japan
Prior art keywords
signal
reference level
photoelectric conversion
compensating
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17189279A
Other languages
Japanese (ja)
Inventor
Yoshihiro Miyamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17189279A priority Critical patent/JPS5694875A/en
Publication of JPS5694875A publication Critical patent/JPS5694875A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/40Picture signal circuits
    • H04N1/405Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels
    • H04N1/4055Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels producing a clustered dots or a size modulated halftone pattern
    • H04N1/4056Halftoning, i.e. converting the picture signal of a continuous-tone original into a corresponding signal showing only two levels producing a clustered dots or a size modulated halftone pattern the pattern varying in one dimension only, e.g. dash length, pulse width modulation [PWM]

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE:To prevent deterioration of picture quality due to the photoelectric conversion system, by performing a binary coding with the reference level signal which varies regularly within the unit cycle of the picture element signal row and then compensating the reference level signal with the compensation signal obtained by giving a photoelectric conversion to the reference pattern. CONSTITUTION:The reference level signa generator 5 delivers the reference level signal having a certain amplitude of the saw-tooth wave. On the other hand, the level compensating signal is delivered from the line sensor 1 in case the reference pattern is formed in an even white color and then stored in the memory 2. This compensating signal corresponds to the characteristic distribution proper to the photoelectric conversion system. Then a multiplication is given by the multiplier 6 between the signal given from the generator 5 and the memory signal of the memory 2. This output signal is turned into the reference level signal which received an amplitude modulation in correspondence to the compensating signal. This level signal is compared with the video signal of the sensor 1 through the comparator 3 and then binary coded, and this binary coded signal is extracted through the output termianl 8. In such way, the deterioration of quality is prevented for the reproduced picture, which is caused by the characteristic distribution proper to the photoelectric conversion system.
JP17189279A 1979-12-28 1979-12-28 Binary signal processor Pending JPS5694875A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17189279A JPS5694875A (en) 1979-12-28 1979-12-28 Binary signal processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17189279A JPS5694875A (en) 1979-12-28 1979-12-28 Binary signal processor

Publications (1)

Publication Number Publication Date
JPS5694875A true JPS5694875A (en) 1981-07-31

Family

ID=15931733

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17189279A Pending JPS5694875A (en) 1979-12-28 1979-12-28 Binary signal processor

Country Status (1)

Country Link
JP (1) JPS5694875A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5128698A (en) * 1990-01-19 1992-07-07 International Business Machines Corporation Boldness control in an electrophotographic machine

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4883724A (en) * 1972-02-08 1973-11-08
JPS4933414A (en) * 1972-07-27 1974-03-27
JPS5046425A (en) * 1973-08-30 1975-04-25
JPS5345537U (en) * 1976-09-22 1978-04-18
JPS53137632A (en) * 1977-05-07 1978-12-01 Fujitsu Ltd Binarizing system for read-in signal

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4883724A (en) * 1972-02-08 1973-11-08
JPS4933414A (en) * 1972-07-27 1974-03-27
JPS5046425A (en) * 1973-08-30 1975-04-25
JPS5345537U (en) * 1976-09-22 1978-04-18
JPS53137632A (en) * 1977-05-07 1978-12-01 Fujitsu Ltd Binarizing system for read-in signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5128698A (en) * 1990-01-19 1992-07-07 International Business Machines Corporation Boldness control in an electrophotographic machine

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