JPS568853A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS568853A
JPS568853A JP8359179A JP8359179A JPS568853A JP S568853 A JPS568853 A JP S568853A JP 8359179 A JP8359179 A JP 8359179A JP 8359179 A JP8359179 A JP 8359179A JP S568853 A JPS568853 A JP S568853A
Authority
JP
Japan
Prior art keywords
sealing
cap
drawn
machined
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8359179A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6220699B2 (enrdf_load_stackoverflow
Inventor
Katsuhiko Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8359179A priority Critical patent/JPS568853A/ja
Publication of JPS568853A publication Critical patent/JPS568853A/ja
Publication of JPS6220699B2 publication Critical patent/JPS6220699B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Non-Volatile Memory (AREA)
  • Light Receiving Elements (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
JP8359179A 1979-07-02 1979-07-02 Semiconductor device Granted JPS568853A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8359179A JPS568853A (en) 1979-07-02 1979-07-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8359179A JPS568853A (en) 1979-07-02 1979-07-02 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS568853A true JPS568853A (en) 1981-01-29
JPS6220699B2 JPS6220699B2 (enrdf_load_stackoverflow) 1987-05-08

Family

ID=13806725

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8359179A Granted JPS568853A (en) 1979-07-02 1979-07-02 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS568853A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7402458B2 (en) * 2002-05-10 2008-07-22 Texas Instruments Incorporated Stress relieved flat frame for DMD window

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0248198U (enrdf_load_stackoverflow) * 1988-09-30 1990-04-03

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7402458B2 (en) * 2002-05-10 2008-07-22 Texas Instruments Incorporated Stress relieved flat frame for DMD window

Also Published As

Publication number Publication date
JPS6220699B2 (enrdf_load_stackoverflow) 1987-05-08

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