JPS5683054A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5683054A JPS5683054A JP16002179A JP16002179A JPS5683054A JP S5683054 A JPS5683054 A JP S5683054A JP 16002179 A JP16002179 A JP 16002179A JP 16002179 A JP16002179 A JP 16002179A JP S5683054 A JPS5683054 A JP S5683054A
- Authority
- JP
- Japan
- Prior art keywords
- package
- semiconductor chip
- brazed
- integrated circuit
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Abstract
PURPOSE:To improve a thermal radiation property and advance mounting density by a method wherein a bump system face-down type semiconductor integrated circuit chip is brazed to a package at a surrounding section of a bump disposing surface. CONSTITUTION:A protective film 2 is formed on a semiconductor substrate 1 with an integrated circuit region 9, a face-down type semiconductor chip 4' to which solder bumps 3 are mounted is placed on a semiconductor package 5 with wiring pads 7 in a shape that the surface is downward directed, and the package 5 and the semiconductor chip 4' are brazed by a frame brazing layer 8 over the whole circumference of a surrounding section 11 to which the bumps 3 are disposed. Thus, a radiating property of the semiconductor chip is improved, mounting density is advanced, and the arithmetic speed of a high-speed logical circuit, etc. can be increased.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16002179A JPS5683054A (en) | 1979-12-10 | 1979-12-10 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP16002179A JPS5683054A (en) | 1979-12-10 | 1979-12-10 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5683054A true JPS5683054A (en) | 1981-07-07 |
Family
ID=15706252
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP16002179A Pending JPS5683054A (en) | 1979-12-10 | 1979-12-10 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5683054A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5988864A (en) * | 1982-11-12 | 1984-05-22 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
JPS63114222A (en) * | 1986-10-31 | 1988-05-19 | Texas Instr Japan Ltd | Semiconductor device |
EP0429282A2 (en) * | 1989-11-20 | 1991-05-29 | Motorola, Inc. | Thermal protection circuit for a power semiconductor switch |
DE4323799A1 (en) * | 1992-07-15 | 1994-01-20 | Toshiba Kawasaki Kk | Semiconductor module coupled to pcb by face-down technology - has contact bumps of solder for connecting chip electrodes to circuit board electrodes, with wall piece not in contact with bumps |
US5672912A (en) * | 1995-11-21 | 1997-09-30 | Sharp Kabushiki Kaisha | Resin-sealed type semiconductor device and method for manufacturing the same |
-
1979
- 1979-12-10 JP JP16002179A patent/JPS5683054A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5988864A (en) * | 1982-11-12 | 1984-05-22 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
JPS63114222A (en) * | 1986-10-31 | 1988-05-19 | Texas Instr Japan Ltd | Semiconductor device |
EP0429282A2 (en) * | 1989-11-20 | 1991-05-29 | Motorola, Inc. | Thermal protection circuit for a power semiconductor switch |
DE4323799A1 (en) * | 1992-07-15 | 1994-01-20 | Toshiba Kawasaki Kk | Semiconductor module coupled to pcb by face-down technology - has contact bumps of solder for connecting chip electrodes to circuit board electrodes, with wall piece not in contact with bumps |
DE4323799B4 (en) * | 1992-07-15 | 2005-04-28 | Toshiba Kawasaki Kk | Semiconductor device and method for its production |
US5672912A (en) * | 1995-11-21 | 1997-09-30 | Sharp Kabushiki Kaisha | Resin-sealed type semiconductor device and method for manufacturing the same |
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