JPS5677969A - Information processor of virtual memory system - Google Patents

Information processor of virtual memory system

Info

Publication number
JPS5677969A
JPS5677969A JP15410079A JP15410079A JPS5677969A JP S5677969 A JPS5677969 A JP S5677969A JP 15410079 A JP15410079 A JP 15410079A JP 15410079 A JP15410079 A JP 15410079A JP S5677969 A JPS5677969 A JP S5677969A
Authority
JP
Japan
Prior art keywords
stp
segment
change
register
table pointer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15410079A
Other languages
Japanese (ja)
Inventor
Tamotsu Noji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP15410079A priority Critical patent/JPS5677969A/en
Publication of JPS5677969A publication Critical patent/JPS5677969A/en
Pending legal-status Critical Current

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  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To shorten the address converting action, by deciding whether the segment table pointer and the segment index are changed or not and then eliminating the table fetching action on a memory in case no change is given.
CONSTITUTION: The new segment table pointer (STP) is supplied to the STP register 1 to be compared with the STP which was used precedently and is held at the buffer register (STPB)2 of the STP. On the other hand, the segment index (LA1) of the logic address used for the one-preceding address conversion and held at the logic address register (LAR)2 is compared 14 with the segment index within the logic address to be converted newly. In case the coincidence is obtained through the above two comparisons, the change bit 15 becomes 0 to show that no change has been given to the STP and LA1. Thus the page table pointer (PTP) which was set previously to the PTPB9 becomes avavilable. As a result, the first addition of STP+LA1 and the memory fetching action can be eliminated.
COPYRIGHT: (C)1981,JPO&Japio
JP15410079A 1979-11-28 1979-11-28 Information processor of virtual memory system Pending JPS5677969A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15410079A JPS5677969A (en) 1979-11-28 1979-11-28 Information processor of virtual memory system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15410079A JPS5677969A (en) 1979-11-28 1979-11-28 Information processor of virtual memory system

Publications (1)

Publication Number Publication Date
JPS5677969A true JPS5677969A (en) 1981-06-26

Family

ID=15576909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15410079A Pending JPS5677969A (en) 1979-11-28 1979-11-28 Information processor of virtual memory system

Country Status (1)

Country Link
JP (1) JPS5677969A (en)

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