JPS56764A - Fsk modulation system - Google Patents
Fsk modulation systemInfo
- Publication number
- JPS56764A JPS56764A JP7619479A JP7619479A JPS56764A JP S56764 A JPS56764 A JP S56764A JP 7619479 A JP7619479 A JP 7619479A JP 7619479 A JP7619479 A JP 7619479A JP S56764 A JPS56764 A JP S56764A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- fsk modulation
- pulse
- circuit
- input data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
- H04L27/12—Modulator circuits; Transmitter circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
PURPOSE:To increase the reliability of data transmission, by avoiding the discontinuity of phase at the switching point of input data, by obtaining the FSK modulation signal after the synchronism of the input data with the signals in frequencies f1, f2 and also with the FSK modulation output signal. CONSTITUTION:The input data a is formed into the signal (e) taking synchronism with the FSK modulation output signal (b) at the FF circuit 4. This signal (e) is taken with the synchronism with the signal (c) in frequency f1 at the FF circuit 5, and the signal (h) output from the gate circuit 9 starts the pulse with a delay in the maximum T1=1/f1 from the rising point of the signal (e) and the pulse is stopped at the trailing of the signal (e). On the other hand, the output signal (e) is synchronized with the signal (d) in frequency f2 at the FF circuit 6, and the signal (i) from the gate circuit 10 starts the pulse with a delay of maximum T2=1/f2 from the trailing point of the signal (e) and the pulse stops at the leading of the signal (e). FSK modulation signal (b) is obtained by passing through the signals h, i to the gate circuit 11. This signal (b) has the region in continuous with 1, 0 levels at the switching point of the input data (a).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7619479A JPS56764A (en) | 1979-06-15 | 1979-06-15 | Fsk modulation system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7619479A JPS56764A (en) | 1979-06-15 | 1979-06-15 | Fsk modulation system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56764A true JPS56764A (en) | 1981-01-07 |
Family
ID=13598325
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7619479A Pending JPS56764A (en) | 1979-06-15 | 1979-06-15 | Fsk modulation system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56764A (en) |
-
1979
- 1979-06-15 JP JP7619479A patent/JPS56764A/en active Pending
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