JPS5667484A - Quantizing circuit - Google Patents

Quantizing circuit

Info

Publication number
JPS5667484A
JPS5667484A JP14310679A JP14310679A JPS5667484A JP S5667484 A JPS5667484 A JP S5667484A JP 14310679 A JP14310679 A JP 14310679A JP 14310679 A JP14310679 A JP 14310679A JP S5667484 A JPS5667484 A JP S5667484A
Authority
JP
Japan
Prior art keywords
signal
analog
level
character
analog signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14310679A
Other languages
Japanese (ja)
Inventor
Tetsuo Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14310679A priority Critical patent/JPS5667484A/en
Publication of JPS5667484A publication Critical patent/JPS5667484A/en
Pending legal-status Critical Current

Links

Landscapes

  • Character Input (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE: To obtain a quantized signal that is invariably accurate and follows up the change in level of an analog signal of the light and shade of a readout character, by comparing a signal having a white level part limited with an analog signal obtained by a photoelectric converter in OCR.
CONSTITUTION: As photoelectric converter 5 scans characters 2 successively, sample holding circuit 7 outputs analog signal (a) and the output signal of the 1st and 2nd analog switches 8 and 9 turning on-off by turns is analog signal (b) having horizontal synchronizing signal A removed. This signal (b) is passed through level tracking circuit 11, so that output sigal (c) will be clamped at 0v only in the period of the 2nd pulse P2. This clamped signal (c) is supplied to limiter circuit 15 to obtain signal (d) having the white level limited. This signal (d) is compared with analog signal (a) by comparator 14, which outputs binarycoded quantized signal (e). Thus, even if analog signals B2 and B1 of a dark character and light character are inputted, the quantization can be done by following up the change in level with invariable accuracy.
COPYRIGHT: (C)1981,JPO&Japio
JP14310679A 1979-11-05 1979-11-05 Quantizing circuit Pending JPS5667484A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14310679A JPS5667484A (en) 1979-11-05 1979-11-05 Quantizing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14310679A JPS5667484A (en) 1979-11-05 1979-11-05 Quantizing circuit

Publications (1)

Publication Number Publication Date
JPS5667484A true JPS5667484A (en) 1981-06-06

Family

ID=15331040

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14310679A Pending JPS5667484A (en) 1979-11-05 1979-11-05 Quantizing circuit

Country Status (1)

Country Link
JP (1) JPS5667484A (en)

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