JPS5665234A - Loop test system - Google Patents

Loop test system

Info

Publication number
JPS5665234A
JPS5665234A JP14087079A JP14087079A JPS5665234A JP S5665234 A JPS5665234 A JP S5665234A JP 14087079 A JP14087079 A JP 14087079A JP 14087079 A JP14087079 A JP 14087079A JP S5665234 A JPS5665234 A JP S5665234A
Authority
JP
Japan
Prior art keywords
loop test
stop
synchronous
circuit
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14087079A
Other languages
Japanese (ja)
Inventor
Kohei Nakasu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14087079A priority Critical patent/JPS5665234A/en
Publication of JPS5665234A publication Critical patent/JPS5665234A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to very easily execute the control for the loop test, by detecting a position where a transmission error has occurred, making certain of the response whenever one character is transmitted.
CONSTITUTION: The sychronous state of a data of the transmitter/receiver circuit 2 is changed to the start-stop synchrnous system from the synchronous system only in case of the circuit loop test, by the command C1 from the control part 3. And the circuit 2 can transmit and receive a data by the start-stop synchronous system by using a clock of the frequency dividing ratio 1/1 of the circuits L1, L2, which is received from the synchronous MODEM1, and the synchronous system is changed to the start-stop system at the time of the loop test. In this way, the control for the loop test can be executed very easily by detecting a position where a transmission error has occurred, making certain of the response whenever one character is transmitted.
COPYRIGHT: (C)1981,JPO&Japio
JP14087079A 1979-10-31 1979-10-31 Loop test system Pending JPS5665234A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14087079A JPS5665234A (en) 1979-10-31 1979-10-31 Loop test system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14087079A JPS5665234A (en) 1979-10-31 1979-10-31 Loop test system

Publications (1)

Publication Number Publication Date
JPS5665234A true JPS5665234A (en) 1981-06-02

Family

ID=15278659

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14087079A Pending JPS5665234A (en) 1979-10-31 1979-10-31 Loop test system

Country Status (1)

Country Link
JP (1) JPS5665234A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009271594A (en) * 2008-04-30 2009-11-19 Fujitsu Ltd Storage device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009271594A (en) * 2008-04-30 2009-11-19 Fujitsu Ltd Storage device

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