JPS5652936A - Digital type phase lock loop circuit - Google Patents
Digital type phase lock loop circuitInfo
- Publication number
- JPS5652936A JPS5652936A JP13273780A JP13273780A JPS5652936A JP S5652936 A JPS5652936 A JP S5652936A JP 13273780 A JP13273780 A JP 13273780A JP 13273780 A JP13273780 A JP 13273780A JP S5652936 A JPS5652936 A JP S5652936A
- Authority
- JP
- Japan
- Prior art keywords
- output
- oscillator
- frequency
- input
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/181—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a numerical count result being used for locking the loop, the counter counting during fixed time intervals
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/077,980 US4316152A (en) | 1979-09-24 | 1979-09-24 | Data tracking phase locked loop |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5652936A true JPS5652936A (en) | 1981-05-12 |
| JPS6340370B2 JPS6340370B2 (OSRAM) | 1988-08-10 |
Family
ID=22141141
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13273780A Granted JPS5652936A (en) | 1979-09-24 | 1980-09-24 | Digital type phase lock loop circuit |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US4316152A (OSRAM) |
| JP (1) | JPS5652936A (OSRAM) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62120123A (ja) * | 1985-11-20 | 1987-06-01 | Matsushita Electric Ind Co Ltd | Rom出力のラツチ方法 |
| JPH024017A (ja) * | 1988-06-20 | 1990-01-09 | Hitachi Ltd | ディジタル位相同期回路 |
| JPH0230218A (ja) * | 1988-07-20 | 1990-01-31 | Nec Corp | 位相同期回路 |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4375693A (en) * | 1981-04-23 | 1983-03-01 | Ford Aerospace & Communications Corporation | Adaptive sweep bit synchronizer |
| US4472818A (en) * | 1981-12-02 | 1984-09-18 | Standard Microsystems Corporation | Data separator |
| US4531102A (en) * | 1983-02-28 | 1985-07-23 | Gk Technologies, Incorporated | Digital phase lock loop system |
| DE3345142C1 (de) * | 1983-12-14 | 1985-02-14 | Telefunken Fernseh Und Rundfunk Gmbh, 3000 Hannover | Schaltung zur Zeitkompression oder Zeitexpansion eines Videosignals |
| US4639680A (en) * | 1985-04-12 | 1987-01-27 | Sperry Corporation | Digital phase and frequency detector |
| DE3604965C1 (de) * | 1986-02-17 | 1987-09-10 | Nixdorf Computer Ag | Verfahren und Schaltungsanordnung zum Synchronisieren eines insbesondere einer Vermittlungseinrichtung zugehoerigen spannungsgesteuerten Oszillators |
| JPS6369354A (ja) * | 1986-09-10 | 1988-03-29 | Sumitomo Electric Ind Ltd | 復調装置 |
| CA1279909C (en) * | 1986-12-15 | 1991-02-05 | Scott Marshall | Apparatus and method for synchronizing a communication system |
| US5031230A (en) * | 1988-10-24 | 1991-07-09 | Simulcomm Partnership | Frequency, phase and modulation control system which is especially useful in simulcast transmission systems |
| DE3843835A1 (de) * | 1988-12-24 | 1990-07-05 | Bosch Gmbh Robert | Schaltungsanordnung zur verbesserung der frequenzgenauigkeit eines in der funktechnik verwendeten referenzoszillators |
| FR2682236B1 (fr) * | 1991-10-04 | 1997-01-03 | Cit Alcatel | Procede et dispositif de commande de mode de fonctionnement d'une boucle a verrouillage de phase numerique |
| US5424881A (en) * | 1993-02-01 | 1995-06-13 | Cirrus Logic, Inc. | Synchronous read channel |
| US5406592A (en) * | 1993-07-30 | 1995-04-11 | At&T Corp. | First order FLL/PLL system with low phase error |
| US5570398A (en) * | 1994-05-02 | 1996-10-29 | Seagate Technology, Inc. | Method and apparatus for dynamic pole-zero reconfiguration for use with hard disc drive servos, electronic filters and other circuits |
| US5978425A (en) * | 1997-05-23 | 1999-11-02 | Hitachi Micro Systems, Inc. | Hybrid phase-locked loop employing analog and digital loop filters |
| EP1285498B1 (en) * | 2000-05-24 | 2005-11-30 | John W. Bogdan | High resolution phase frequency detectors |
| US6765446B2 (en) * | 2002-09-18 | 2004-07-20 | Hewlett-Packard Development Company, L.P. | Frequency lock loop having a reloadable counter without rollover |
| US8368812B2 (en) * | 2007-09-07 | 2013-02-05 | Thomson Licensing | PLL loop able to recover a synchronisation clock rhythm comprising a temporal discontinuity |
| FR2935569A1 (fr) * | 2009-01-30 | 2010-03-05 | Thomson Licensing | Dispositif de reception recevant des signaux de marquage temporel vehicules dans des paquets. |
| CN115825560B (zh) * | 2023-02-17 | 2023-05-23 | 青岛鼎信通讯股份有限公司 | 一种基于频率跟踪技术的低压电网智能核相方法 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3271688A (en) * | 1963-04-17 | 1966-09-06 | Hans W Gschwind | Frequency and phase controlled synchronization circuit |
| US4138650A (en) * | 1972-05-15 | 1979-02-06 | Anderson Scott K | Phase lock loop |
| US4151485A (en) * | 1977-11-21 | 1979-04-24 | Rockwell International Corporation | Digital clock recovery circuit |
-
1979
- 1979-09-24 US US06/077,980 patent/US4316152A/en not_active Expired - Lifetime
-
1980
- 1980-09-24 JP JP13273780A patent/JPS5652936A/ja active Granted
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62120123A (ja) * | 1985-11-20 | 1987-06-01 | Matsushita Electric Ind Co Ltd | Rom出力のラツチ方法 |
| JPH024017A (ja) * | 1988-06-20 | 1990-01-09 | Hitachi Ltd | ディジタル位相同期回路 |
| JPH0230218A (ja) * | 1988-07-20 | 1990-01-31 | Nec Corp | 位相同期回路 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6340370B2 (OSRAM) | 1988-08-10 |
| US4316152A (en) | 1982-02-16 |
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