JPS5651899A - Method of manufacturing high density multilayer circuit board - Google Patents

Method of manufacturing high density multilayer circuit board

Info

Publication number
JPS5651899A
JPS5651899A JP12918679A JP12918679A JPS5651899A JP S5651899 A JPS5651899 A JP S5651899A JP 12918679 A JP12918679 A JP 12918679A JP 12918679 A JP12918679 A JP 12918679A JP S5651899 A JPS5651899 A JP S5651899A
Authority
JP
Japan
Prior art keywords
circuit board
high density
multilayer circuit
manufacturing high
density multilayer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12918679A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6155796B2 (cs
Inventor
Akihiro Doutani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP12918679A priority Critical patent/JPS5651899A/ja
Publication of JPS5651899A publication Critical patent/JPS5651899A/ja
Publication of JPS6155796B2 publication Critical patent/JPS6155796B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP12918679A 1979-10-05 1979-10-05 Method of manufacturing high density multilayer circuit board Granted JPS5651899A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12918679A JPS5651899A (en) 1979-10-05 1979-10-05 Method of manufacturing high density multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12918679A JPS5651899A (en) 1979-10-05 1979-10-05 Method of manufacturing high density multilayer circuit board

Publications (2)

Publication Number Publication Date
JPS5651899A true JPS5651899A (en) 1981-05-09
JPS6155796B2 JPS6155796B2 (cs) 1986-11-29

Family

ID=15003260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12918679A Granted JPS5651899A (en) 1979-10-05 1979-10-05 Method of manufacturing high density multilayer circuit board

Country Status (1)

Country Link
JP (1) JPS5651899A (cs)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59171195A (ja) * 1983-03-18 1984-09-27 日本碍子株式会社 セラミツク多層配線基板の製造法
JPS60167497A (ja) * 1984-02-10 1985-08-30 松下電器産業株式会社 多層回路基板の製造方法
JP2007308931A (ja) * 2006-05-17 2007-11-29 Kawasaki Heavy Ind Ltd シールド掘進機の破砕装置

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59171195A (ja) * 1983-03-18 1984-09-27 日本碍子株式会社 セラミツク多層配線基板の製造法
JPS60167497A (ja) * 1984-02-10 1985-08-30 松下電器産業株式会社 多層回路基板の製造方法
JP2007308931A (ja) * 2006-05-17 2007-11-29 Kawasaki Heavy Ind Ltd シールド掘進機の破砕装置

Also Published As

Publication number Publication date
JPS6155796B2 (cs) 1986-11-29

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