JPS5646334A - Timer device - Google Patents
Timer deviceInfo
- Publication number
- JPS5646334A JPS5646334A JP12200079A JP12200079A JPS5646334A JP S5646334 A JPS5646334 A JP S5646334A JP 12200079 A JP12200079 A JP 12200079A JP 12200079 A JP12200079 A JP 12200079A JP S5646334 A JPS5646334 A JP S5646334A
- Authority
- JP
- Japan
- Prior art keywords
- time constant
- circuit
- signal
- input signal
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/04—Shaping pulses by increasing duration; by decreasing duration
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electronic Switches (AREA)
Abstract
PURPOSE:To enable to produce the timer output according to the input signal simply, by changing the time constant of the time constant circuit according to the input signal and adding the output to the sole time limit control circuit. CONSTITUTION:When an input signal (a) is input, the transistor TRQ1 in the time control circuit 2 is on, the comparator COM1 is triggered with the differentiation circuit consisting of a resistor R7 and a capacitor C0, FF-F is set, and the timer signal T is at H level. On the other hand, the signal (a) opens the analog gate G1 in the time constant circuit 1, connects the time constant resistor R1 to the power supply E, and the capacitor C is charged up in the time constant R1 C. When the charging voltage of the capacitance C exceeds the voltage dividing value formed with the resistances R8-R10 in the comparison circuit COM2, FF-F is reset, the charge in the capacitor C is discharged through TRQ turned on, thereby preparing the circuit to the next signal input. This can be applied also to the case with signals (b)-(d), and the output of different time can be developed depending on the input signal by suitably selecting the time constant resistances R1-R4 and voltage dividing resistances R8-R10.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12200079A JPS5646334A (en) | 1979-09-25 | 1979-09-25 | Timer device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12200079A JPS5646334A (en) | 1979-09-25 | 1979-09-25 | Timer device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5646334A true JPS5646334A (en) | 1981-04-27 |
Family
ID=14825073
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12200079A Pending JPS5646334A (en) | 1979-09-25 | 1979-09-25 | Timer device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5646334A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5830336U (en) * | 1981-08-20 | 1983-02-28 | エスエムシ−株式会社 | Delay time selection circuit |
JPS5830335U (en) * | 1981-08-20 | 1983-02-28 | エスエムシ−株式会社 | Delay time selection circuit |
-
1979
- 1979-09-25 JP JP12200079A patent/JPS5646334A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5830336U (en) * | 1981-08-20 | 1983-02-28 | エスエムシ−株式会社 | Delay time selection circuit |
JPS5830335U (en) * | 1981-08-20 | 1983-02-28 | エスエムシ−株式会社 | Delay time selection circuit |
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