JPS5634264A - Code detecting circuit - Google Patents

Code detecting circuit

Info

Publication number
JPS5634264A
JPS5634264A JP10959079A JP10959079A JPS5634264A JP S5634264 A JPS5634264 A JP S5634264A JP 10959079 A JP10959079 A JP 10959079A JP 10959079 A JP10959079 A JP 10959079A JP S5634264 A JPS5634264 A JP S5634264A
Authority
JP
Japan
Prior art keywords
read
output signal
signal
rom
ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10959079A
Other languages
Japanese (ja)
Inventor
Takao Gotoda
Ryoichi Shinoda
Tetsumasa Ooyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10959079A priority Critical patent/JPS5634264A/en
Publication of JPS5634264A publication Critical patent/JPS5634264A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042—Detectors therefor, e.g. correlators, state machines

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To make it possible to cope with change of a code pattern easily without almost change of hardware, by constituting a code detecting circuit with a bit pattern comparator, a read-only memory circuit, and a temporary memory circuit. CONSTITUTION:Contents are read from temporary memory circuit RAM at operation timing I, and only one L of outputs above is applied to the address input of read-only memory ROM at timing II, and the other signal H controls control signals E and F so that I may be ''0''. At this time, output signal J of ROM is compared with input signal A in bit pattern comparing circuit BPC. At the rise of the control signal, ''1'' or ''0'' is established for output signal D of BPC on a basis of the comparison result. After comparison of output signal J, the flag provided in, for example, RAM is rewritten with ''1''. Therefore, since output signal L of RAM changes from ''1'' to ''0'' after are comparison, the read address for ROM is changed to read new contents.
JP10959079A 1979-08-28 1979-08-28 Code detecting circuit Pending JPS5634264A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10959079A JPS5634264A (en) 1979-08-28 1979-08-28 Code detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10959079A JPS5634264A (en) 1979-08-28 1979-08-28 Code detecting circuit

Publications (1)

Publication Number Publication Date
JPS5634264A true JPS5634264A (en) 1981-04-06

Family

ID=14514111

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10959079A Pending JPS5634264A (en) 1979-08-28 1979-08-28 Code detecting circuit

Country Status (1)

Country Link
JP (1) JPS5634264A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57193171A (en) * 1981-05-22 1982-11-27 Nec Corp Synchronism detecting device for facsimile signal
JPS6123436A (en) * 1984-07-11 1986-01-31 Nippon Telegr & Teleph Corp <Ntt> Data transmitter and receiver

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57193171A (en) * 1981-05-22 1982-11-27 Nec Corp Synchronism detecting device for facsimile signal
JPS6322669B2 (en) * 1981-05-22 1988-05-12 Nippon Electric Co
JPS6123436A (en) * 1984-07-11 1986-01-31 Nippon Telegr & Teleph Corp <Ntt> Data transmitter and receiver

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