JPS5629330A - Surface treatment of silicon wafer - Google Patents

Surface treatment of silicon wafer

Info

Publication number
JPS5629330A
JPS5629330A JP10538879A JP10538879A JPS5629330A JP S5629330 A JPS5629330 A JP S5629330A JP 10538879 A JP10538879 A JP 10538879A JP 10538879 A JP10538879 A JP 10538879A JP S5629330 A JPS5629330 A JP S5629330A
Authority
JP
Japan
Prior art keywords
wafer
side surfaces
ion
electrode
sheathes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10538879A
Other languages
Japanese (ja)
Other versions
JPS5841767B2 (en
Inventor
Shojiro Miyake
Hiroki Kuwano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP54105388A priority Critical patent/JPS5841767B2/en
Publication of JPS5629330A publication Critical patent/JPS5629330A/en
Publication of JPS5841767B2 publication Critical patent/JPS5841767B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02019—Chemical etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To eliminate pollution of both side surfaces of an Si wafer and to eliminate a defect on one side surface thereof by sputter etching both side surfaces of the wafer with high energy ions and then only one side surface thereof with low energy ions. CONSTITUTION:An Si wafer 7a is retained perpendicularly with respect to a lower electrode 3 on an SiO2 base plate 6 by using a specimen supporting jig 8, a lower electrode 2 is grounded, and high frequency voltage is applied to the electrode 3. Resultantly, ion sheathes 11 are formed on both side surfaces of the wafer 7a to sputter etch simultaneously both the surfaces thereof. Then, an Si wafer 7d is laid down on the base plate 6 by using a moving mechanism, and smaller high frequency electric power than the previous step is applied to the electrode 3. As a result, ion sheathes 11 are formed thereon as shown in a view, to sputter etch only the side surface exposed with the wafer 7d. In this manner the polluted alkaline metals which have been difficult to be removed are completely removed from both side surfaces thereof, and defects being caused by ion impact are substantially eliminated on the surface at the side to form a semiconductor device thereon.
JP54105388A 1979-08-18 1979-08-18 Silicon wafer surface treatment method Expired JPS5841767B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54105388A JPS5841767B2 (en) 1979-08-18 1979-08-18 Silicon wafer surface treatment method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54105388A JPS5841767B2 (en) 1979-08-18 1979-08-18 Silicon wafer surface treatment method

Publications (2)

Publication Number Publication Date
JPS5629330A true JPS5629330A (en) 1981-03-24
JPS5841767B2 JPS5841767B2 (en) 1983-09-14

Family

ID=14406260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54105388A Expired JPS5841767B2 (en) 1979-08-18 1979-08-18 Silicon wafer surface treatment method

Country Status (1)

Country Link
JP (1) JPS5841767B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5770278A (en) * 1980-10-22 1982-04-30 Nec Kyushu Ltd Plasma etching apparatus

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6268976U (en) * 1985-10-18 1987-04-30

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS562634A (en) * 1979-06-20 1981-01-12 Mitsubishi Electric Corp Parallel flat plate type plasma etching device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS562634A (en) * 1979-06-20 1981-01-12 Mitsubishi Electric Corp Parallel flat plate type plasma etching device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5770278A (en) * 1980-10-22 1982-04-30 Nec Kyushu Ltd Plasma etching apparatus

Also Published As

Publication number Publication date
JPS5841767B2 (en) 1983-09-14

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