JPS5841767B2 - Silicon wafer surface treatment method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention involves sputter etching the front side of a polished silicon wafer in a plasma vessel having two electrodes and containing fluorocarbon gas or fluorocarbon-oxygen mixed gas. , relates to a method for surface treatment of silicon wafers.

Traditionally, processing of silicon wafers involves lapping,
Finishing methods such as etching and mechanochemical boring are commonly used, but they inevitably cause contamination due to the abrasive grains used, residual chemical fluids, etc.

Therefore, for the purpose of cleaning the silicon wafer surface again, it has already been proposed in Japanese Patent Publication No. 14470/1988 to plasma-treat the surface of a silicon wafer.

Additionally, methods of chemical plasma etching using various fluorocarbon gases have been considered.

In these methods, a silicon wafer to be processed is placed upright in plasma and both sides are processed simultaneously.

However, these methods do not involve the active sputtering phenomenon of ions, so the amount of processing is small, and when the vapor pressure of the contaminant is low, or when the contaminant forms a compound with a high vapor pressure due to a chemical reaction with the ion. If they are not formed, there is a drawback that they tend to remain.

For example, it has been difficult to remove alkali metals and the like that become mobile ions in semiconductor devices and the like.

Furthermore, a method of performing irreactive sputter etching using a CF4,02 mixed gas has also been proposed.

In this method, since the sputtering action is combined, a good machined surface with little contamination can be obtained.

However, in this method, the silicon wafer to be processed is always placed lying down on the stage, so the contamination on the back side of the silicon wafer is not removed, and therefore, the silicon wafer processed in this way cannot be left as it is. If introduced into processes such as oxidation, there was a risk of contaminating the oxidation furnace, etc.

Furthermore, if the ion energy during sputter etching is too high, defects will occur on the surface of the silicon wafer due to ion bombardment, while if it is too low, contamination will not be removed. previously unknown.

Therefore, it is an object of the present invention to provide a method for surface treatment of a silicon wafer, which can completely eliminate contamination on both sides of the silicon wafer, and also prevent one side from containing defects due to ion bombardment.

In order to achieve the above object, the method for surface treatment of silicon wafers of the type mentioned at the beginning according to the invention provides a method for surface treatment of silicon wafers of the type mentioned at the beginning.
Stand the above SiO2 on an iO2 base plate or use a conductor.
The two sides of the silicon wafer are placed in a plasma container with both sides exposed, except for a small part necessary for installation, and both sides of the silicon wafer are sputtered with ions accelerated by simultaneous ionization. a first step of etching, and after the first step, the silicon wafer is etched with SiO2 by a moving mechanism provided in the plasma chamber;
The main feature is that the method is installed on a base plate with only one side exposed, and a second step is performed in which the exposed surface is sputter-etched with lower energy than in the first step.

The present invention will be explained in more detail below using examples with reference to the accompanying drawings, but these are merely illustrative, and it goes without saying that various improvements and modifications may be made without going beyond the scope of the present invention. It is.

FIG. 1 is a block diagram showing an example of a high frequency sputter etching apparatus used to carry out the first step of the silicon wafer surface treatment method according to the present invention.

In FIG. 1, a stainless steel vacuum chamber 1 forming a plasma container is provided with a gas supply hole 1a and an exhaust hole 1b.

In the vacuum chamber, an upper electrode 2 and a lower electrode 3 are arranged facing each other.

The upper electrode 2 is grounded through the vacuum chamber 1, the lower electrode 3 is supported on an insulating stand 12, and a high frequency voltage from a high frequency power source 4 is applied through an impedance matching circuit 5. There is.

One of the output terminals of the high frequency power supply 4 is grounded, and a high frequency voltage is output to the impedance matching circuit 5.

SiO is placed on the lower electrode 3 to avoid exposing the metal surface.
Two boards 6 are installed.

FIG. 2 schematically shows a silicon wafer 1a to be processed held substantially perpendicular to the lower electrode 3 on a SiO2 base plate 6 using a sample support jig 8, in accordance with the present invention. This is shown in a cross-sectional view.

Ion sheaths 11 are formed on both sides of the silicon wafer 7a, and both sides are sputter etched at the same time.

The silicon wafer to be processed does not have to stand upright with respect to the lower electrode 3, as shown in FIG.

FIG. 3 shows another embodiment of the invention.

In this embodiment, the silicon wafer 7b to be processed is held substantially parallel to and spaced apart from the lower electrode 3 using a conductor jig 9.

In this embodiment as well, ion sheaths 11 are formed on both sides of the silicon wafer to be processed.

FIG. 4 is shown for comparison and does not represent an embodiment of the present invention.

Here, the silicon wafer 7c to be processed is S
It is supported by a jig 10 made of iO2 or the like, and in this case, the ion sheath 11 is not formed near the silicon wafer 7c to be processed.

FIG. 5 shows a method of setting up a silicon wafer to be processed in conventional glue active sputter etching, but in the second step of the silicon wafer surface treatment method according to the present invention, the silicon wafer to be processed is It is installed exactly as shown.

In this case, the silicon wafer 7d to be processed is placed horizontally on the S i 02 base plate, the ion sheath 11 is formed as shown in the figure, and only one exposed side of the silicon wafer to be processed is sputter-etched. be done.

FIG. 6 shows the processing speed of these wafers using a CF4,02 mixed gas.

The silicon wafer 7a has ions accelerated by an ion sheath on both sides and undergoes reactive sputter etching, so the processing speed is high, and the processing speed on each side is about the same as that of the silicon wafer 7d, which is placed lying on a SiO□ base plate. shows the machining speed.

Silicon wafer 7b is also span-touched at a similar processing speed.

On the other hand, since the silicon wafer 7c is placed in the plasma chamber without self-bias, the processing speed is as low as about 1/20 of that of the silicon wafer 7c.

Of course, the back surface of the silicon wafer 7d is not etched.

These results show that, according to the present invention, both sides of a silicon wafer can be sputter-etched simultaneously, and the processing speed on each side is as high as when sputter-etching one side.

FIG. 7 shows a silicon wafer immersed in a NaOH solution and contaminated with CF4. The figure shows the ratio of the peak heights of the measured values of 23Na and 28St by secondary 5th order ion mass spectrometry when performing reactive sputter etching with an O□ mixed gas, using the RFt force as a parameter.

Na was removed by reactive sputter etching and the peak height ratio of ``Na'' and 288i was ``I2''.
/I28Si+ becomes a -11 constant limit value determined by RF power.

Moreover, this limit value shows a smaller value as the RFt force increases.

This suggests that Na is removed mainly by the sputtering action of ions.

That is, when sputter etching is performed with carbon fluoride gas, S
Na on the i surface does not exist as INa alone, but as NaF.

N a 2 S I Fa etc., which is assumed to be fixed on the surface and removed by sputtering.

Therefore, in the first step of the silicon wafer surface treatment method according to the present invention, if both sides of the silicon wafer are sputter-etched using carbon fluoride gas under high power conditions, Na etc., which were previously difficult to remove, can be removed. Alkali metal contamination can also be removed.

As mentioned above, if both sides of the silicon wafer are sputter-etched under high power conditions, contamination can be removed, but the high electric field accelerates the ions to a high energy level, and the ions hit the silicon wafer and touch its surface. Form defects.

Therefore, according to the present invention, after simultaneously scrubber etching both sides of the silicon wafer with high energy ions in the state shown in FIG. 2 or 3,
Using a moving mechanism provided within the vacuum chamber, the silicon wafer is moved to the state shown in FIG.

In this state, the bias voltage of the high J frequency power supply, which was 1.2 kV for the first process, was lowered to about 0.9 kV with a smaller high frequency output than in the first process, and the silicon wafer was heated. By sputter-etching only the exposed surface with low-energy ions, it is possible to reduce the defect density where, for example, a semiconductor device is to be formed.

Cover part of the back side of silicone Ueno with a mask,
In the first step, both sides are sputter-etched with high-energy ions, and the silicon wafer is transferred onto an SiO2 base plate by a moving mechanism provided in a vacuum chamber, and the exposed side is etched in the state shown in FIG. Only low energy C
When processed with F4.02 Ganuion and checked the OS,
The defect density on the surface where the back side is masked is 3X1
0''Crn-2, whereas the defect density on the surface where the back surface was not masked was 2 x 1026In-2.

This is understood to mean that defects formed by sputter etching using high-energy ions have a gettering effect on the defects formed on the surface.

As described above, according to the surface treatment method for silicon wafer of the present invention, contamination with alkali metals such as Na, which was difficult to remove in the past, can be completely removed from both sides, and semiconductor devices, etc. It is possible to obtain a silicon wafer that is substantially free from defects caused by ion bombardment on the side to which it is exposed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of a high-frequency sputter etching apparatus used to carry out the first step of the silicon wafer surface treatment method according to the present invention, and FIG. FIG. 3 is a schematic cross-sectional view showing a method of installing a silicon wafer in another embodiment of the first step of the method; FIG. Cross section, 4th
The figures are shown for comparison only; they correspond to FIGS. 2 and 3 and are schematic cross-sectional views showing other silicon wafer installation methods; FIG. A schematic cross-sectional view showing the silicon wafer installation method in the second step, FIG. 6 is a diagram showing processing speeds in various silicon wafer installation methods,
FIG. 7 is a diagram showing the ratio of peak heights of 23Na and 28Si measured values by secondary ion mass spectrometry on silicon wafers treated by the method of the present invention. 1... Vacuum chamber, 1a... Gas supply hole,
1b... Gas exhaust hole, 2... Upper electrode,
3...Lower electrode, 4...High frequency power supply, 5
・・・・・・Impedance matching circuit, 6=SiO
Two boards? a, 7b, 7cs za+/++- silicon wafer, 8... Sample support jig, 9...
Conductor jig, 10... Jig made of 5i02 etc., 11... Ion sheath, 12...
・Insulating stand.

Claims (1)

[Claims] 1 In a silicon wafer surface treatment method in which the surface of a polished silicon wafer is sputter-etched in a plasma vessel having two electrodes and containing fluorocarbon gas or fluorocarbon-oxygen mixed residue, the surface of the polished silicon wafer is Stand a silicon wafer on a 5i02 base plate provided on one electrode, or use a conductor to raise it from the 5i02 base plate, and remove both sides of the silicon wafer, except for a small part necessary for installation. a first step in which the silicon wafer is placed in an exposed state in a plasma container, and both sides of the silicon wafer are simultaneously sputter-etched with ions accelerated by an ion sheath; a second step in which the silicon wafer is placed on the 5i02 base plate with only one side exposed by the moving mechanism provided in the wafer, and the exposed first surface is sputter-etched with lower energy than in the first step; A method for surface treatment of silicon wafer 1, characterized by comprising the steps of: