JPS562662A - Laminated electric circuit - Google Patents

Laminated electric circuit

Info

Publication number
JPS562662A
JPS562662A JP7820479A JP7820479A JPS562662A JP S562662 A JPS562662 A JP S562662A JP 7820479 A JP7820479 A JP 7820479A JP 7820479 A JP7820479 A JP 7820479A JP S562662 A JPS562662 A JP S562662A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
region
circuit
wiring
provided
connected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7820479A
Other versions
JPS6230500B2 (en )
Inventor
Tsuneyo Chiba
Akira Masaki
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5223Capacitor integral with wiring layers
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To obtain a laminated electric circuit without having a bad contact between electrodes by providing a capacitance electrode on the opposed surfaces of the opposing electric circuit flat plates by performing a signal transmission of each region provided on the flat plates using the said electrodes. CONSTITUTION:The inside and the outside surfaces of a P-type Si substrate 20 are used as wiring regions 30 and 40 respectively, and the exterior front and back sides of the above are used as capacitor regions 50 and 60. Also, at the section which comes into contact with the wiring region of the substrate 20, a logical circuit region 22, a transmission circuit region 24, receiving circuit region 26 etc. are provided. In the region 30 opposing to the region 22, a wiring materials 32 and 34 to be connected to the other circuit 22 are formed and they are shielded using a conductive member 36. Also a wiring material 38 is connected to the regions 24 and 26 respectively, and one end of the said wiring material is connected to a capacitance electrode 52 provided on the region 50. On the regions 40 and 60, a wiring material 42 and a capacitance electrode 62 are provided. Thus, the electrodes 52 and 62 are connected by an N-type continuity path 28 which is provided in the substrate 20 and a circuit without having a bad contact can be obtained.
JP7820479A 1979-06-22 1979-06-22 Expired JPS6230500B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7820479A JPS6230500B2 (en) 1979-06-22 1979-06-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7820479A JPS6230500B2 (en) 1979-06-22 1979-06-22

Publications (2)

Publication Number Publication Date
JPS562662A true true JPS562662A (en) 1981-01-12
JPS6230500B2 JPS6230500B2 (en) 1987-07-02

Family

ID=13655487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7820479A Expired JPS6230500B2 (en) 1979-06-22 1979-06-22

Country Status (1)

Country Link
JP (1) JPS6230500B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61180468A (en) * 1985-02-06 1986-08-13 Agency Of Ind Science & Technol Laminated type semiconductor device
DE3623735A1 (en) * 1985-07-19 1987-01-22 Hitachi Ltd Signaluebertragungsschaltung
US4893174A (en) * 1985-07-08 1990-01-09 Hitachi, Ltd. High density integration of semiconductor circuit
US5165010A (en) * 1989-01-06 1992-11-17 Hitachi, Ltd. Information processing system
JP2005093999A (en) * 2003-09-05 2005-04-07 Sun Microsyst Inc Proximity communication which is electrically aligned
JP2008004714A (en) * 2006-06-22 2008-01-10 Nec Corp Chip-laminated semiconductor device
US7990747B2 (en) 2007-03-09 2011-08-02 Nec Corporation Semiconductor chip and semiconductor device

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61180468A (en) * 1985-02-06 1986-08-13 Agency Of Ind Science & Technol Laminated type semiconductor device
US4893174A (en) * 1985-07-08 1990-01-09 Hitachi, Ltd. High density integration of semiconductor circuit
DE3623735A1 (en) * 1985-07-19 1987-01-22 Hitachi Ltd Signaluebertragungsschaltung
US4723082A (en) * 1985-07-19 1988-02-02 Hitachi, Ltd. Signal transfer circuit for use in laminated multilayer electric circuit
US5165010A (en) * 1989-01-06 1992-11-17 Hitachi, Ltd. Information processing system
JP2005093999A (en) * 2003-09-05 2005-04-07 Sun Microsyst Inc Proximity communication which is electrically aligned
JP2008004714A (en) * 2006-06-22 2008-01-10 Nec Corp Chip-laminated semiconductor device
US7990747B2 (en) 2007-03-09 2011-08-02 Nec Corporation Semiconductor chip and semiconductor device

Also Published As

Publication number Publication date Type
JPS6230500B2 (en) 1987-07-02 grant
JP1424825C (en) grant

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