JPS562662A - Laminated electric circuit - Google Patents

Laminated electric circuit

Info

Publication number
JPS562662A
JPS562662A JP7820479A JP7820479A JPS562662A JP S562662 A JPS562662 A JP S562662A JP 7820479 A JP7820479 A JP 7820479A JP 7820479 A JP7820479 A JP 7820479A JP S562662 A JPS562662 A JP S562662A
Authority
JP
Japan
Prior art keywords
region
circuit
wiring
regions
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7820479A
Other languages
Japanese (ja)
Other versions
JPS6230500B2 (en
Inventor
Akira Masaki
Tsuneyo Chiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP7820479A priority Critical patent/JPS562662A/en
Publication of JPS562662A publication Critical patent/JPS562662A/en
Publication of JPS6230500B2 publication Critical patent/JPS6230500B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5223—Capacitor integral with wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a laminated electric circuit without having a bad contact between electrodes by providing a capacitance electrode on the opposed surfaces of the opposing electric circuit flat plates by performing a signal transmission of each region provided on the flat plates using the said electrodes. CONSTITUTION:The inside and the outside surfaces of a P-type Si substrate 20 are used as wiring regions 30 and 40 respectively, and the exterior front and back sides of the above are used as capacitor regions 50 and 60. Also, at the section which comes into contact with the wiring region of the substrate 20, a logical circuit region 22, a transmission circuit region 24, receiving circuit region 26 etc. are provided. In the region 30 opposing to the region 22, a wiring materials 32 and 34 to be connected to the other circuit 22 are formed and they are shielded using a conductive member 36. Also a wiring material 38 is connected to the regions 24 and 26 respectively, and one end of the said wiring material is connected to a capacitance electrode 52 provided on the region 50. On the regions 40 and 60, a wiring material 42 and a capacitance electrode 62 are provided. Thus, the electrodes 52 and 62 are connected by an N-type continuity path 28 which is provided in the substrate 20 and a circuit without having a bad contact can be obtained.
JP7820479A 1979-06-22 1979-06-22 Laminated electric circuit Granted JPS562662A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7820479A JPS562662A (en) 1979-06-22 1979-06-22 Laminated electric circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7820479A JPS562662A (en) 1979-06-22 1979-06-22 Laminated electric circuit

Publications (2)

Publication Number Publication Date
JPS562662A true JPS562662A (en) 1981-01-12
JPS6230500B2 JPS6230500B2 (en) 1987-07-02

Family

ID=13655487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7820479A Granted JPS562662A (en) 1979-06-22 1979-06-22 Laminated electric circuit

Country Status (1)

Country Link
JP (1) JPS562662A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61180468A (en) * 1985-02-06 1986-08-13 Agency Of Ind Science & Technol Laminated type semiconductor device
DE3623735A1 (en) * 1985-07-19 1987-01-22 Hitachi Ltd SIGNAL TRANSFER CIRCUIT
US4893174A (en) * 1985-07-08 1990-01-09 Hitachi, Ltd. High density integration of semiconductor circuit
US5165010A (en) * 1989-01-06 1992-11-17 Hitachi, Ltd. Information processing system
JP2005093999A (en) * 2003-09-05 2005-04-07 Sun Microsyst Inc Proximity communication which is electrically aligned
JP2005535116A (en) * 2002-07-29 2005-11-17 サン・マイクロシステムズ・インコーポレイテッド Method and apparatus for electrically aligning capacitively coupled chip pads
JP2008004714A (en) * 2006-06-22 2008-01-10 Nec Corp Chip-laminated semiconductor device
US7990747B2 (en) 2007-03-09 2011-08-02 Nec Corporation Semiconductor chip and semiconductor device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61180468A (en) * 1985-02-06 1986-08-13 Agency Of Ind Science & Technol Laminated type semiconductor device
US4893174A (en) * 1985-07-08 1990-01-09 Hitachi, Ltd. High density integration of semiconductor circuit
DE3623735A1 (en) * 1985-07-19 1987-01-22 Hitachi Ltd SIGNAL TRANSFER CIRCUIT
US4723082A (en) * 1985-07-19 1988-02-02 Hitachi, Ltd. Signal transfer circuit for use in laminated multilayer electric circuit
US5165010A (en) * 1989-01-06 1992-11-17 Hitachi, Ltd. Information processing system
JP2005535116A (en) * 2002-07-29 2005-11-17 サン・マイクロシステムズ・インコーポレイテッド Method and apparatus for electrically aligning capacitively coupled chip pads
JP2005093999A (en) * 2003-09-05 2005-04-07 Sun Microsyst Inc Proximity communication which is electrically aligned
JP2008004714A (en) * 2006-06-22 2008-01-10 Nec Corp Chip-laminated semiconductor device
US7990747B2 (en) 2007-03-09 2011-08-02 Nec Corporation Semiconductor chip and semiconductor device

Also Published As

Publication number Publication date
JPS6230500B2 (en) 1987-07-02

Similar Documents

Publication Publication Date Title
FR2471659B1 (en)
US4252990A (en) Electronic circuit parts
ES8609808A1 (en) Capacitive switches
SE9700910D0 (en) Laminated symmetry transformer
JPS562662A (en) Laminated electric circuit
JPS6452305A (en) Continuous flexble electric conductor which can function as electric switch
JPS5661679A (en) Indicating device
JPS5467792A (en) Elastic surface wave element
JPS5544743A (en) Manufacture of semiconductor device
JPS5694814A (en) Elastic surface wave device
JPS5647105A (en) Slot array antenna unit
JPS5664459A (en) Transistor amplifier
GB8812958D0 (en) Thermal imaging
JPS5419365A (en) High frequency high output transistor
JPS542042A (en) Oscillation circuit
JPS5452958A (en) Elastic surface wave device
JPS5614383A (en) Coordinate input device
JPS5318979A (en) Mis type integrated circuit
JPS5791566A (en) Solar battery element
JPS57143914A (en) Edge mode ceramic filter
JPS51134662A (en) Electronic clock
JPS5466793A (en) Piezoelectric oscillator
JPS5376728A (en) Microwave circuit
JPS554130A (en) Schmitt circuit
JPS5651112A (en) Production of surface wave element