JPS5625857A - Binary circuit - Google Patents

Binary circuit

Info

Publication number
JPS5625857A
JPS5625857A JP10162979A JP10162979A JPS5625857A JP S5625857 A JPS5625857 A JP S5625857A JP 10162979 A JP10162979 A JP 10162979A JP 10162979 A JP10162979 A JP 10162979A JP S5625857 A JPS5625857 A JP S5625857A
Authority
JP
Japan
Prior art keywords
amplifier
signal
output
fed
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10162979A
Other languages
Japanese (ja)
Other versions
JPS5920218B2 (en
Inventor
Michiaki Miyagawa
Masao Nito
Yutaka Yunoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP54101629A priority Critical patent/JPS5920218B2/en
Publication of JPS5625857A publication Critical patent/JPS5625857A/en
Publication of JPS5920218B2 publication Critical patent/JPS5920218B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/065—Binary decisions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/062—Setting decision thresholds using feedforward techniques only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Closed-Circuit Television Systems (AREA)
  • Facsimile Image Signal Circuits (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To obtain the binary pulse with fidelity of original signal, without being subject to the effect of black level changed in the temperature change, by picking up the substantial signal through the subtraction of background level from the video signal output from the photoelectric conversion unit. CONSTITUTION:After amplifying the video signal (a) from the photoelectric conversion unit fed to the input terminal 11 at the amplifier 12, it is fed to one terminal of the differential amplifier 13 and the sample hold circuit 14. The output level of the amplifier 12 is held at the circuit 14 in synchronizing with the output pulse (b) of the sample hold control circuit 15, the level (c) held is input to another terminal of the amplifier 13 to obtain the difference with the output signal of the amplifier 12 and the difference is fed to the differential amplifier 17. Further, the background level is subtracted from the signal (a) with the amplifier 13, the difference with the potential of the DC power supply 18 is obtained at the amplifier 17 and the substantial signal (d) is output to the output of the amplifier 17. This signal is fed to the integration element circuit 26 and the adder 23, the outputs of the circuit 26 and adder 23 are fed to the comparator 24, to obtain binary pulse of signal (a) with fidelity.
JP54101629A 1979-08-09 1979-08-09 Binarization circuit Expired JPS5920218B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54101629A JPS5920218B2 (en) 1979-08-09 1979-08-09 Binarization circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54101629A JPS5920218B2 (en) 1979-08-09 1979-08-09 Binarization circuit

Publications (2)

Publication Number Publication Date
JPS5625857A true JPS5625857A (en) 1981-03-12
JPS5920218B2 JPS5920218B2 (en) 1984-05-11

Family

ID=14305685

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54101629A Expired JPS5920218B2 (en) 1979-08-09 1979-08-09 Binarization circuit

Country Status (1)

Country Link
JP (1) JPS5920218B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2531825A1 (en) * 1982-08-13 1984-02-17 Pays Gerard Useful signal discriminator for the reception of a digital signal transmitted over infrared medium.
JPS59202757A (en) * 1983-04-30 1984-11-16 Matsushita Electric Ind Co Ltd Serial signal transmitter between electronic controllers

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2531825A1 (en) * 1982-08-13 1984-02-17 Pays Gerard Useful signal discriminator for the reception of a digital signal transmitted over infrared medium.
JPS59202757A (en) * 1983-04-30 1984-11-16 Matsushita Electric Ind Co Ltd Serial signal transmitter between electronic controllers

Also Published As

Publication number Publication date
JPS5920218B2 (en) 1984-05-11

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