JPS5623065A - Demodulation circuit for self clocking information signal - Google Patents

Demodulation circuit for self clocking information signal

Info

Publication number
JPS5623065A
JPS5623065A JP6513680A JP6513680A JPS5623065A JP S5623065 A JPS5623065 A JP S5623065A JP 6513680 A JP6513680 A JP 6513680A JP 6513680 A JP6513680 A JP 6513680A JP S5623065 A JPS5623065 A JP S5623065A
Authority
JP
Japan
Prior art keywords
circuit
signal
inversion interval
clocking information
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6513680A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6348109B2 (enrdf_load_stackoverflow
Inventor
Yoji Sugiura
Masaru Nishimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP6513680A priority Critical patent/JPS5623065A/ja
Publication of JPS5623065A publication Critical patent/JPS5623065A/ja
Publication of JPS6348109B2 publication Critical patent/JPS6348109B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4904—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using self-synchronising codes, e.g. split-phase codes

Landscapes

  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
JP6513680A 1980-05-15 1980-05-15 Demodulation circuit for self clocking information signal Granted JPS5623065A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6513680A JPS5623065A (en) 1980-05-15 1980-05-15 Demodulation circuit for self clocking information signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6513680A JPS5623065A (en) 1980-05-15 1980-05-15 Demodulation circuit for self clocking information signal

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2966179A Division JPS55121769A (en) 1979-03-13 1979-03-13 Demodulator circuit for self-clocking information signal

Publications (2)

Publication Number Publication Date
JPS5623065A true JPS5623065A (en) 1981-03-04
JPS6348109B2 JPS6348109B2 (enrdf_load_stackoverflow) 1988-09-27

Family

ID=13278159

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6513680A Granted JPS5623065A (en) 1980-05-15 1980-05-15 Demodulation circuit for self clocking information signal

Country Status (1)

Country Link
JP (1) JPS5623065A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01268329A (ja) * 1988-04-20 1989-10-26 Mitsubishi Electric Corp 符号変換装置
EP0967562A3 (en) * 1998-06-05 2003-05-07 Hitachi, Ltd. Communication method of contactless ID card and integrated circuit used therein

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01268329A (ja) * 1988-04-20 1989-10-26 Mitsubishi Electric Corp 符号変換装置
EP0967562A3 (en) * 1998-06-05 2003-05-07 Hitachi, Ltd. Communication method of contactless ID card and integrated circuit used therein
US6765959B1 (en) 1998-06-05 2004-07-20 Hitachi, Ltd. Communication method of contactless ID card and integrated circuit used in communication method
US7116709B2 (en) 1998-06-05 2006-10-03 Hitachi, Ltd. Communication method of contactless ID card and integrated circuit used in communication method

Also Published As

Publication number Publication date
JPS6348109B2 (enrdf_load_stackoverflow) 1988-09-27

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