JPS5619241A - Selective call receiving circuit - Google Patents

Selective call receiving circuit

Info

Publication number
JPS5619241A
JPS5619241A JP8454380A JP8454380A JPS5619241A JP S5619241 A JPS5619241 A JP S5619241A JP 8454380 A JP8454380 A JP 8454380A JP 8454380 A JP8454380 A JP 8454380A JP S5619241 A JPS5619241 A JP S5619241A
Authority
JP
Japan
Prior art keywords
signal
receiving station
time
circuit
station
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8454380A
Other languages
Japanese (ja)
Other versions
JPS576303B2 (en
Inventor
Seizo Nakamura
Hiroshi Shimizu
Shunsuke Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP8454380A priority Critical patent/JPS5619241A/en
Publication of JPS5619241A publication Critical patent/JPS5619241A/en
Publication of JPS576303B2 publication Critical patent/JPS576303B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W84/00—Network topologies

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

PURPOSE:To prevent the useless call signal (discrimination signal) from being produced through the speaker and turning to the noise, by securing such constitution in that the speaker is made to produce the sound at the receiving station only in the lapse of a fixed time after receiving the common signal. CONSTITUTION:Restart-type delay circuit 19 and gate circuit 20 are provided, and receiving station 8, 9 and 10 are called by call signals (1a, 2, 3), (1a, 4, 5) and (1a, 6, 7) respectively. And each of the 1st signals of the discrimination signals is defined as common signal 1a. When signal 1a is received at receiving station 8, delay time T1 having a length decided previously is set in circuit 19 a little longer than the time up to the end of reception of the 3rd signal 3. In case receiving station 9 is called after receiving station 8, common signal 1a is sent in for station 9. When station 9 receives signal 1a, delay time T2 is set as mentioned above. And at the same time, signal 1a is received also at atation 8. Then circuit 19 is restarted to set newly delay time T1. Accordingly, the useless discrimination signal is never produced at that time through speaker 18.
JP8454380A 1980-06-24 1980-06-24 Selective call receiving circuit Granted JPS5619241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8454380A JPS5619241A (en) 1980-06-24 1980-06-24 Selective call receiving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8454380A JPS5619241A (en) 1980-06-24 1980-06-24 Selective call receiving circuit

Publications (2)

Publication Number Publication Date
JPS5619241A true JPS5619241A (en) 1981-02-23
JPS576303B2 JPS576303B2 (en) 1982-02-04

Family

ID=13833559

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8454380A Granted JPS5619241A (en) 1980-06-24 1980-06-24 Selective call receiving circuit

Country Status (1)

Country Link
JP (1) JPS5619241A (en)

Also Published As

Publication number Publication date
JPS576303B2 (en) 1982-02-04

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