JPS56166655A - Data relief system - Google Patents
Data relief systemInfo
- Publication number
- JPS56166655A JPS56166655A JP7031480A JP7031480A JPS56166655A JP S56166655 A JPS56166655 A JP S56166655A JP 7031480 A JP7031480 A JP 7031480A JP 7031480 A JP7031480 A JP 7031480A JP S56166655 A JPS56166655 A JP S56166655A
- Authority
- JP
- Japan
- Prior art keywords
- potential
- code
- sent
- normal
- fault
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
PURPOSE:To perform normal code transfer even when a fault is not removed, by performing parallel operation by superposing DC binary codes inverted in potential relation even when the fault that one potential is converted into the other is occurring. CONSTITUTION:For a logical code 1010...10 and parity bit 1 sent from a transmitting register 1, an earth potential 0V sent from terminals 7'-15 of a transmitted data selector 7 is converted into a potential V1, which is received by the received data selector 8 as DC binary code with normal potential relation and reverse potential relation. The binary code with the normal potential relation is transmitted to a receiving register 2 and parity check circuit 4 in parallel, which recognizes them as the logical code 1010...10 and 1 to perform error detecting processing. With the DC binary code with the reverse potential relation sent from the selector 7, the potential V1 is sent from the terminal 7'-15 for ''0''. Therefore, normal code transfer is performed even in case of the occurrence of the fault of the circuit 3-15 of a transmission line 3.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7031480A JPS56166655A (en) | 1980-05-27 | 1980-05-27 | Data relief system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7031480A JPS56166655A (en) | 1980-05-27 | 1980-05-27 | Data relief system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56166655A true JPS56166655A (en) | 1981-12-21 |
Family
ID=13427861
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7031480A Pending JPS56166655A (en) | 1980-05-27 | 1980-05-27 | Data relief system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56166655A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5260511A (en) * | 1975-11-14 | 1977-05-19 | Nec Corp | Parallel transmission circuits |
-
1980
- 1980-05-27 JP JP7031480A patent/JPS56166655A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5260511A (en) * | 1975-11-14 | 1977-05-19 | Nec Corp | Parallel transmission circuits |
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