JPS56166553A - Information process having advanced control function - Google Patents

Information process having advanced control function

Info

Publication number
JPS56166553A
JPS56166553A JP6898680A JP6898680A JPS56166553A JP S56166553 A JPS56166553 A JP S56166553A JP 6898680 A JP6898680 A JP 6898680A JP 6898680 A JP6898680 A JP 6898680A JP S56166553 A JPS56166553 A JP S56166553A
Authority
JP
Japan
Prior art keywords
circuit
instruction
transfer
inter
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6898680A
Other languages
Japanese (ja)
Other versions
JPS6120893B2 (en
Inventor
Kozo Yamano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP6898680A priority Critical patent/JPS56166553A/en
Publication of JPS56166553A publication Critical patent/JPS56166553A/en
Publication of JPS6120893B2 publication Critical patent/JPS6120893B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)

Abstract

PURPOSE:To make queuing unnecessary for the address development of the instruction following an inter-register(RG) transfer instruction, by executing this instruction in an advanced control part before an operation control part to quicken determination of RGs in the advanced control part. CONSTITUTION:In an advanced control part, the instruction code of an instruction RG1 is passed to an inter-RG transfer instruction detecting circuit 3; and if it is discriminated that this instruction is an inter-RG transfer instruction by the circuit 3, it is reported to an inter-RG transfer controlling circuit 5. The transfer source RG number of the RG1 is sent to a detecting circuit 7 for coincidence between the transfer source RG number and the RG number queued for determination, a control circuit 8 for RG determination queuing, a base register BR group 9 and in index register IR group 10. The RG number requiring determination queuing from the circuit 8 is reported to the circuit 7, and an address development control circuit 14 starts the address development. The registering suppression from the circuit 5 to the circuit 8 and inter-RG transfer of the BR group 9 or the IR group 10 are instructed. When a selecting circuit 19 receives the inter-RG transfer instruction, the RG side of the transfer source is selected, and pertinent data is written to the BR group 9 or the IR group 10.
JP6898680A 1980-05-26 1980-05-26 Information process having advanced control function Granted JPS56166553A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6898680A JPS56166553A (en) 1980-05-26 1980-05-26 Information process having advanced control function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6898680A JPS56166553A (en) 1980-05-26 1980-05-26 Information process having advanced control function

Publications (2)

Publication Number Publication Date
JPS56166553A true JPS56166553A (en) 1981-12-21
JPS6120893B2 JPS6120893B2 (en) 1986-05-24

Family

ID=13389487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6898680A Granted JPS56166553A (en) 1980-05-26 1980-05-26 Information process having advanced control function

Country Status (1)

Country Link
JP (1) JPS56166553A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58189739A (en) * 1982-04-30 1983-11-05 Hitachi Ltd Data processing system
JPS58189738A (en) * 1982-04-30 1983-11-05 Hitachi Ltd Data processing system
JPS6174031A (en) * 1984-09-19 1986-04-16 Hitachi Ltd Advanced control system
JPS61143850A (en) * 1984-12-18 1986-07-01 Nec Corp Processor
US5644746A (en) * 1991-06-13 1997-07-01 International Computers Limited Data processing apparatus with improved mechanism for executing register-to-register transfer instructions

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58189739A (en) * 1982-04-30 1983-11-05 Hitachi Ltd Data processing system
JPS58189738A (en) * 1982-04-30 1983-11-05 Hitachi Ltd Data processing system
JPH0348536B2 (en) * 1982-04-30 1991-07-24 Hitachi Ltd
JPH0348537B2 (en) * 1982-04-30 1991-07-24 Hitachi Ltd
JPS6174031A (en) * 1984-09-19 1986-04-16 Hitachi Ltd Advanced control system
JPS61143850A (en) * 1984-12-18 1986-07-01 Nec Corp Processor
US5644746A (en) * 1991-06-13 1997-07-01 International Computers Limited Data processing apparatus with improved mechanism for executing register-to-register transfer instructions

Also Published As

Publication number Publication date
JPS6120893B2 (en) 1986-05-24

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