JPS56162865A - Gto thyristor stack - Google Patents

Gto thyristor stack

Info

Publication number
JPS56162865A
JPS56162865A JP6535280A JP6535280A JPS56162865A JP S56162865 A JPS56162865 A JP S56162865A JP 6535280 A JP6535280 A JP 6535280A JP 6535280 A JP6535280 A JP 6535280A JP S56162865 A JPS56162865 A JP S56162865A
Authority
JP
Japan
Prior art keywords
gto
capacitor
diode
gto1
fins
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6535280A
Other languages
Japanese (ja)
Inventor
Koichi Miyazaki
Norikatsu Hashizume
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6535280A priority Critical patent/JPS56162865A/en
Publication of JPS56162865A publication Critical patent/JPS56162865A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301—Thyristor

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thyristors (AREA)

Abstract

PURPOSE:To suppress the surge voltage generated upon opening of the GTO of a snapping circuit by connecting directly the anode of the GTO and a diode, as well as a capacitor and the cathode of the GTO, thereby reducing a wiring part. CONSTITUTION:A GTO1 is interposed between cooling fins 5 and 5', and uses the fins 5, 5' as electrodes. A diode 2 is mounted directly on the fin 5'. A capacitor 3 is constructed to commonly use one terminal of an aluminum case, and is intimately contacted (or buried) with the fin 5. Since the GTO1 and the diode 2 as well as the GTO1 and the capacitor 3 are connected via the fins 5, 5', connecting wires are not necessary, thereby enabling to shorten the wire of a loop of the GTO-diode 2- capacitor 3-the GTO.
JP6535280A 1980-05-19 1980-05-19 Gto thyristor stack Pending JPS56162865A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6535280A JPS56162865A (en) 1980-05-19 1980-05-19 Gto thyristor stack

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6535280A JPS56162865A (en) 1980-05-19 1980-05-19 Gto thyristor stack

Publications (1)

Publication Number Publication Date
JPS56162865A true JPS56162865A (en) 1981-12-15

Family

ID=13284469

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6535280A Pending JPS56162865A (en) 1980-05-19 1980-05-19 Gto thyristor stack

Country Status (1)

Country Link
JP (1) JPS56162865A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS642453U (en) * 1987-06-25 1989-01-09

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS642453U (en) * 1987-06-25 1989-01-09

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