GB2081016A

GB2081016A - Assemblies of Semiconductor Devices

Info

Publication number: GB2081016A
Application number: GB8121853A
Authority: GB
Original assignee: Sansha Electric Manufacturing Co Ltd
Current assignee: Sansha Electric Manufacturing Co Ltd
Priority date: 1980-07-28
Filing date: 1981-07-15
Publication date: 1982-02-10
Also published as: JPS5731855U; DE3129287A1

Abstract

A plurality of semiconductor devices 14 (e.g. SCRs or TRIACs) having a gate-electrode and opposed main electrodes, are mounted with that main electrode adjacent to the gate electrode connected to a common conductor 18. This arrangement facilitates firing of the devices by a common pulse generator. The connection is made via conductive plates 15, 16 which have recesses at one corner to accommodate the gate connection 19. Three devices mounted on a common conductor, which also acts as a heat sink, may be encapsulated to provide an assembly for use in three phase circuits. <IMAGE>

Description

SPECIFICATION Semiconductor Device This invention relates to a semiconductor device, particularly an improved composite power semiconductor device which includes a plurality of three-terminal semiconductor elements, such as semiconductor controlled rectifiers (SCRs) or triacs, coupled to a common substrate electrode.

Such composite semiconductor devices as above are known and an example is described in U.S. Patent No. 4,047,197. In these prior art devices, however, each semiconductor element is coupled to the common substrate by that main electrode which is remote from the gate electrodes, and have some disadvantages as described later in this specification.

In accordance with this invention, there is provided a semiconductor device, comprising a conductive substrate and a plurality of threeterminal semiconductor elements each coupled to said substrate as a common electrode, each of said semiconductor elements including a pair of main electrodes defining the ends of a main conduction path and a gate electrode, that main electrode which is adjacent the gate electrode being coupled to said substrate.

Embodiments of this invention will now be described, by way of example only, with reference to the accompanying drawings, in which: Figure 1 is a schematic circuit diagram representing an example of circuit configuration in which a prior art device is used; Figure 2 is a schematic circuit diagram representing a corresponding circuit configuration in which a device in accordance with this invention is used; Figure 3 is an exploded perspective view representing a structure of three-terminal semiconductor elements used in a semiconductor device according to this invention; Figure 4 is a side view representing a pair of semiconductor elements as shown in Figure 3 coupled to a common substrate; Figures 5 and 6 are schematic circuit diagrams in which semiconductor devices according to this invention are used; and Figure 7 is a perspective view representing a semiconductor device according to this invention which is enclosed in a package.

Throughout the drawings, the same reference symbols are given to like structural components.

Referring to Figure 1 showing a prior art arrangement, three-therminal semiconductor elements 10, 20 and 30 are coupled to a common conductive substrate 2, each by one main electrode T2 being that main electrode which is remote from the gate electrode G. In this arrangement, however, it is necessary to provide the semiconductor elements 10, 20 and 30 with respective pulse generators 11, 21 and 31 for independently triggering them. This resulted in a complicated and inconvenient circuit configuration.

Referring to Figure 2 showing an arrangement in accordance with the invention, three-terminal semiconductor elements 10, 20 and 30 are coupled to a common substrate 2, each by that main electrode T1 which is adjacent the gate electrode i.e. that main electrode relative to which the gate is used to establish a bias for triggering.

This device has an advantage that the elements 10, 20 and 30 can be triggered using a single pulse generator 13.

In Figure 3, each semiconductor element includes a semiconductor pellet 14 having an upper surface serving as the electrode T2 and the lower surface serving as the electrode T1, and a gate electrode G is drawn out from the surface in the side of T1 electrode through a lead conductor 19. In the prior art structure, the gate conductor 19 would interfere with connecting the T1 electrode to the common substrate. However, in the element shown, a nickel-clad molybdenum plate 1 5 resistant to thermal stresses is soldered to the T, electrode of the pellet 14 and a metal block 16 having a substantial thickness is also soldered onto the lower surface of the molybdenum plate 15. A similar thermal stress absortive nickel clad molybdenum plate 17 is further soldered onto the T2 electrode of the pellet 14.

As shown in Figure 4, the block 16 is then soldered to the common substrate 18 which may serve as a radiator plate. Thus, the block 16 spaces the gate electrode G from the substrate 18, to allow the gate electrode G to be led out (by an insulated wire 19) without any interference. An electrode plate 22 serving as a terminal is soldered to the electrode plate 17 on the side of the T2 electrode.

As an example, the semiconductor device in accordance with this invention may be connected in a circuit as shown by a dashed block 24 in Figure 5, in which the T, electrodes of the threeterminal semiconductor elements 10, 20 and 30 are coupled through a common terminal 27 corresponding to the substrate 18 of Figure 4 to one terminal of a power supply 23 and the T2 electrodes are coupled through respective loads L1, L2 and L3 to the other terminal of the power supply 23. In this circuit arrangement the simplified gate triggering system of Figure 2 can be used to drive the loads L, L2 and L3 over predetermined respective electrical angles of the a.c. supply.

In another example as shown in Figure 6, a semiconductor device 28 in accordance with this invention is connected with diodes 25 to form a rectifier circuit for driving a load 26 with a multiphase power supply 29. The gate triggering system of Figure 2 can be used also in this case.

The semiconductor device in accordance with this invention may be enclosed in a package as shown in Figure 7 for example. In this example, three semiconductor elements are embedded in insulating material such as silicone rubber and protected from external forces. The gate electrodes of the elements are connected through suitable conductors (not shown) to terminals G1, G2 and G3, the T2 electrodes are connected to terminals 41, 42 and 43 and the T1 electrodes are connected to a base plate or substrate 18 which may serve as a radiator. The whole package is molded with epoxy resin for providing mechanical strength.

Though the device in accordance with this invention can be used conveniently in various circuits, it is especially useful in a brightness control circuit of an illumination system.

Claims

1. A semiconductor device, comprising a conductive substrate and a plurality of threeterminal semiconductor elements each coupled to said substrate as a common electrode, each of said semiconductor elements including a pair of main electrodes defining the ends of a main conduction path and a gate electrode, that main electrode which is adjacent the gate electrode being coupled to said substrate.

2. A semiconductor device according to claim 1, in which, for each said element, said main electrode adjacent the gate electrode is both electrically and mechanicaily coupled through a conducting body to said substrate, said body spacing the gate electrode from the substrate.

3. A semiconductor device#according to claim 1 or 2, in which said substrate serves for heat dissipation.

4. A semiconductor device according to anY preceding claim, in which each said threeterminal semiconductor element comprises a thyristor.

5. A semiconductor device substantially as herein described with reference to Figures 2 4 tr of the accompanying drawings.