JPS56159742A - Priority level controller - Google Patents
Priority level controllerInfo
- Publication number
- JPS56159742A JPS56159742A JP6294080A JP6294080A JPS56159742A JP S56159742 A JPS56159742 A JP S56159742A JP 6294080 A JP6294080 A JP 6294080A JP 6294080 A JP6294080 A JP 6294080A JP S56159742 A JPS56159742 A JP S56159742A
- Authority
- JP
- Japan
- Prior art keywords
- priority level
- register
- parameter
- priority
- level controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To set a priority level freely by setting a parameter by writing the parameter in a rewritable register group. CONSTITUTION:In a register group, values which correspond to priority levels of processing request signals 3-0, 3-1-3-n are written. When the signal 3-0 has priority level ''1'' and turns on, only an ouput 4-00 of a register 2-0 comes to ''1''. Only a logical circuit 5-00, therefore, has level ''1'' and a signal appears at the 7-0 of a program control part 8 via an OR circuit 6-0. When the 3-1 has priority level ''3'', the signal appears at a 7-2. Thus, priority levels of signals 3-0-3-n are determined according to parameter values written in register grops 2-0, 2-1-2-n.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6294080A JPS56159742A (en) | 1980-05-13 | 1980-05-13 | Priority level controller |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6294080A JPS56159742A (en) | 1980-05-13 | 1980-05-13 | Priority level controller |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56159742A true JPS56159742A (en) | 1981-12-09 |
Family
ID=13214797
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6294080A Pending JPS56159742A (en) | 1980-05-13 | 1980-05-13 | Priority level controller |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56159742A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59218561A (en) * | 1983-05-27 | 1984-12-08 | Hitachi Micro Comput Eng Ltd | Microcomputer |
JPS619748A (en) * | 1984-06-25 | 1986-01-17 | Nec Corp | Input and output controller |
JPS63226735A (en) * | 1987-03-17 | 1988-09-21 | Fujitsu Ltd | Register circuit |
-
1980
- 1980-05-13 JP JP6294080A patent/JPS56159742A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59218561A (en) * | 1983-05-27 | 1984-12-08 | Hitachi Micro Comput Eng Ltd | Microcomputer |
JPS619748A (en) * | 1984-06-25 | 1986-01-17 | Nec Corp | Input and output controller |
JPH0574864B2 (en) * | 1984-06-25 | 1993-10-19 | Nippon Electric Co | |
JPS63226735A (en) * | 1987-03-17 | 1988-09-21 | Fujitsu Ltd | Register circuit |
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