JPS56155596A - Method of manufacturing multilalyer printed board - Google Patents

Method of manufacturing multilalyer printed board

Info

Publication number
JPS56155596A
JPS56155596A JP5790380A JP5790380A JPS56155596A JP S56155596 A JPS56155596 A JP S56155596A JP 5790380 A JP5790380 A JP 5790380A JP 5790380 A JP5790380 A JP 5790380A JP S56155596 A JPS56155596 A JP S56155596A
Authority
JP
Japan
Prior art keywords
multilalyer
manufacturing
printed board
printed
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5790380A
Other languages
Japanese (ja)
Inventor
Mitsuo Yamashita
Haruo Kawamata
Kiyotaka Miyagawa
Yuukichi Takeda
Kiyoshi Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5790380A priority Critical patent/JPS56155596A/en
Publication of JPS56155596A publication Critical patent/JPS56155596A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP5790380A 1980-05-02 1980-05-02 Method of manufacturing multilalyer printed board Pending JPS56155596A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5790380A JPS56155596A (en) 1980-05-02 1980-05-02 Method of manufacturing multilalyer printed board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5790380A JPS56155596A (en) 1980-05-02 1980-05-02 Method of manufacturing multilalyer printed board

Publications (1)

Publication Number Publication Date
JPS56155596A true JPS56155596A (en) 1981-12-01

Family

ID=13068943

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5790380A Pending JPS56155596A (en) 1980-05-02 1980-05-02 Method of manufacturing multilalyer printed board

Country Status (1)

Country Link
JP (1) JPS56155596A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61265899A (en) * 1985-05-21 1986-11-25 東芝ケミカル株式会社 Multilayer printed circuit board
JP2008252041A (en) * 2007-03-30 2008-10-16 Ube Ind Ltd Method for manufacturing build-up multilayer wiring board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61265899A (en) * 1985-05-21 1986-11-25 東芝ケミカル株式会社 Multilayer printed circuit board
JP2008252041A (en) * 2007-03-30 2008-10-16 Ube Ind Ltd Method for manufacturing build-up multilayer wiring board

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