JPS56154887A - Sampling circuit for video signal - Google Patents

Sampling circuit for video signal

Info

Publication number
JPS56154887A
JPS56154887A JP5747080A JP5747080A JPS56154887A JP S56154887 A JPS56154887 A JP S56154887A JP 5747080 A JP5747080 A JP 5747080A JP 5747080 A JP5747080 A JP 5747080A JP S56154887 A JPS56154887 A JP S56154887A
Authority
JP
Japan
Prior art keywords
signal
supplied
data
counter
video signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5747080A
Other languages
Japanese (ja)
Inventor
Yuji Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Home Electronics Ltd
NEC Corp
Original Assignee
NEC Home Electronics Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Home Electronics Ltd, Nippon Electric Co Ltd filed Critical NEC Home Electronics Ltd
Priority to JP5747080A priority Critical patent/JPS56154887A/en
Publication of JPS56154887A publication Critical patent/JPS56154887A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/025Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
    • H04N7/035Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Facsimiles In General (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To supply a sampling command at any time in one vertical scanning period, by providing a counter which outputs an address signal and a circuit which supplies a video signal corresponding to an optional picture-element position. CONSTITUTION:Counter 2 is reset with vertical synchronizing pulse VSYNC and then counts horizontal synchronizing signal pulses HSYNC successively. Its count value is supplied as address signal A to data buffer BF. Therefore, when timing signal TM is outputted from preset counter 11 at the timing that corresponds to a picture-element position specified with signal HP in each horizontal scanning period, video signal VD is fetched into shift register 12 by signal TM. Then, it is supplied as data SD to buffer BF. Consequently, data SD is stored successively in memory areas of the data buffer specified with signal A. Thus, the sampling start command is supplied at the same period as one vertical scanning time at a maximum.
JP5747080A 1980-04-30 1980-04-30 Sampling circuit for video signal Pending JPS56154887A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5747080A JPS56154887A (en) 1980-04-30 1980-04-30 Sampling circuit for video signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5747080A JPS56154887A (en) 1980-04-30 1980-04-30 Sampling circuit for video signal

Publications (1)

Publication Number Publication Date
JPS56154887A true JPS56154887A (en) 1981-11-30

Family

ID=13056574

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5747080A Pending JPS56154887A (en) 1980-04-30 1980-04-30 Sampling circuit for video signal

Country Status (1)

Country Link
JP (1) JPS56154887A (en)

Similar Documents

Publication Publication Date Title
KR0156804B1 (en) A start pulse vertical signal doing free-charge independent of bios using data enable signal
ES433910A1 (en) Frame grabbing system
JPS55127656A (en) Picture memory unit
JPS54112122A (en) Picture display unit
JPS5636278A (en) Video reproducing device
JPS6410322A (en) Display device for picture information
EP0080043A3 (en) Method for data storage in an image refresh memory of a vdu
JPS56154887A (en) Sampling circuit for video signal
KR900003230B1 (en) Video display control unit
CA2105841A1 (en) Image and sound processing apparatus
JPS5441011A (en) Display system of television receiver of program reservation system
EP0399136A3 (en) Display apparatus
JPS57111190A (en) Character broadcast receiver
JPS5463621A (en) Crt display system
KR20000025778A (en) Method and apparatus for adjusting picture in image display machine
JPS6486774A (en) Matrix driving display device
HUT63283A (en) Television system for displaying on-screen character with ultrablack videosignal - blaning signal level
JPS6450179A (en) Picture data fetching and processing device
JPS5462728A (en) Raster scan display unit
JPS54154214A (en) Multi-character broadcast transmitter-receiver
KR950004055Y1 (en) On-screen display oscillate circuit in the micro control apparatus
JPS5463622A (en) Crt display system
JPS5610779A (en) Write inhibition control circuit of frame synchronizer
JPS558179A (en) Character broadcast receiving device
JPS54152822A (en) Continuous display unit for trend graph