EP0080043A3 - Method for data storage in an image refresh memory of a vdu - Google Patents

Method for data storage in an image refresh memory of a vdu Download PDF

Info

Publication number
EP0080043A3
EP0080043A3 EP82108854A EP82108854A EP0080043A3 EP 0080043 A3 EP0080043 A3 EP 0080043A3 EP 82108854 A EP82108854 A EP 82108854A EP 82108854 A EP82108854 A EP 82108854A EP 0080043 A3 EP0080043 A3 EP 0080043A3
Authority
EP
European Patent Office
Prior art keywords
control unit
line
video
store
characters
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP82108854A
Other languages
German (de)
Other versions
EP0080043A2 (en
EP0080043B1 (en
Inventor
Pedro Trambale
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to AT82108854T priority Critical patent/ATE31370T1/en
Publication of EP0080043A2 publication Critical patent/EP0080043A2/en
Publication of EP0080043A3 publication Critical patent/EP0080043A3/en
Application granted granted Critical
Publication of EP0080043B1 publication Critical patent/EP0080043B1/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/06—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows
    • G09G1/14—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible
    • G09G1/16—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible the pattern of rectangular co-ordinates extending over the whole area of the screen, i.e. television type raster
    • G09G1/165—Details of a display terminal using a CRT, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/001—Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/22—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory

Abstract

1. A video display terminal comprising a refresh store (3) in which the characters which are to be displayed are stored in binary-coded form and in which data items can be input from an external data source under the control of a store access control unit (1), comprising a video control unit (6) which controls the display of the correct characters on the screen (8), comprising two line buffers (24, 25) which are designed as a clock interface and via which the characters are conducted from the refresh store to the video control unit, where a line buffer accommodates all the characters of a line which is to be displayed, where one of the line buffers can be connected to the refresh store and the other line buffer can be connected to the video control unit, and where the video control unit controls the two control line buffers in such manner that simultaneously with the display of the content of the one line buffer on the screen, the other line buffer is loaded from the refresh store with the characters which are to be displayed next, characterised in that at the beginning of every line sweep (40) of a video cycle, the video control unit (6) supplies a request signal to the store access control unit (1), but then the refresh store (3) and one of the line buffers (24, 25) is supplied with a signal to input data from the external data source under the control of the function control unit (1), that simultaneously with the line sweep (40) data items are input into the refresh store (3) and into one of the line buffers (24, 25), and that at the end of a video cycle the video control unit (6) supplies the function control unit (1) with a synchronising signal which terminates the input of the data.
EP82108854A 1981-09-30 1982-09-24 Method for data storage in an image refresh memory of a vdu Expired EP0080043B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT82108854T ATE31370T1 (en) 1981-09-30 1982-09-24 METHOD OF WRITING DATA INTO A REFRESH MEMORY OF A DISPLAY DEVICE.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3138930 1981-09-30
DE3138930A DE3138930C2 (en) 1981-09-30 1981-09-30 Data display device

Publications (3)

Publication Number Publication Date
EP0080043A2 EP0080043A2 (en) 1983-06-01
EP0080043A3 true EP0080043A3 (en) 1985-07-03
EP0080043B1 EP0080043B1 (en) 1987-12-09

Family

ID=6143067

Family Applications (1)

Application Number Title Priority Date Filing Date
EP82108854A Expired EP0080043B1 (en) 1981-09-30 1982-09-24 Method for data storage in an image refresh memory of a vdu

Country Status (4)

Country Link
US (1) US4970501A (en)
EP (1) EP0080043B1 (en)
AT (1) ATE31370T1 (en)
DE (1) DE3138930C2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3319944A1 (en) * 1983-06-01 1984-12-06 Siemens AG, 1000 Berlin und 8000 München Device for the read/write operation of a frame buffer
US4679038A (en) * 1983-07-18 1987-07-07 International Business Machines Corporation Band buffer display system
JPS60114896A (en) * 1983-11-25 1985-06-21 ソニー株式会社 Dispaly circuit
DE3588173T2 (en) * 1984-07-23 1998-06-10 Texas Instruments Inc Video system
DE3838827A1 (en) * 1988-11-17 1990-05-23 Thomson Brandt Gmbh IMAGE PLAYBACK SYSTEM
JPH03116194A (en) * 1989-09-29 1991-05-17 Mitsubishi Electric Corp Display controller
FR2664999B1 (en) * 1990-07-23 1992-09-18 Bull Sa DATA OUTPUT INPUT DEVICE FOR DISPLAYING INFORMATION AND METHOD USED BY SUCH A DEVICE.
FR2669448B1 (en) * 1990-11-19 1993-01-15 Bull Sa TERMINAL ARCHITECTURE AND MANAGEMENT CIRCUIT.
WO1993020513A1 (en) * 1992-04-07 1993-10-14 Chips And Technologies, Inc. Method and apparatus for performing run length tagging for increased bandwidth in dynamic data repetitive memory systems
US20020140818A1 (en) * 2001-04-02 2002-10-03 Pelco System and method for generating raster video test patterns

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4156904A (en) * 1976-08-25 1979-05-29 Hitachi, Ltd. Computer systems having a common memory shared between a central processor and a CRT display
DE3026225A1 (en) * 1980-07-10 1982-02-04 Siemens AG, 1000 Berlin und 8000 München Visual display system for alpha numeric data - utilises buffer storage between character memory and display control unit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4117469A (en) * 1976-12-20 1978-09-26 Levine Michael R Computer assisted display processor having memory sharing by the computer and the processor
US4177462A (en) * 1976-12-30 1979-12-04 Umtech, Inc. Computer control of television receiver display
US4146877A (en) * 1977-05-26 1979-03-27 Zimmer Edward F Character generator for video display

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4156904A (en) * 1976-08-25 1979-05-29 Hitachi, Ltd. Computer systems having a common memory shared between a central processor and a CRT display
DE3026225A1 (en) * 1980-07-10 1982-02-04 Siemens AG, 1000 Berlin und 8000 München Visual display system for alpha numeric data - utilises buffer storage between character memory and display control unit

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
ELECTRONIC DESIGN, Band 28, Nr.17, August 1980, Seiten 123-127, ROCHELLE PARK, (US). R. DAVIES: "Refresh graphics peripheral configures to the host system".* Figur 1 ; Seite 123 - Seite 124, Zeile 6 * *
ELECTRONIC DESIGN, Band 29, Nr. 9, April 1981, Seiten 131-138, WASECA, MN, (US). T. ROSSL: "Low-cost CRT control does more with less" * Figuren 1-3, 5 ; Seiten 133-134 * *
ELECTRONICS, Band 52, Nr. 14, Juli 1979, Seiten 136-139, NEW YORK, (US). L. TROTTIER et al.: "Transparent memory ends conflicts over CRT control" * Seite 139 ; Figuren 1-4 * *

Also Published As

Publication number Publication date
ATE31370T1 (en) 1987-12-15
EP0080043A2 (en) 1983-06-01
DE3138930C2 (en) 1985-11-07
DE3138930A1 (en) 1983-04-14
US4970501A (en) 1990-11-13
EP0080043B1 (en) 1987-12-09

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