JPS56147047A - Bit division type adder - Google Patents

Bit division type adder

Info

Publication number
JPS56147047A
JPS56147047A JP5047480A JP5047480A JPS56147047A JP S56147047 A JPS56147047 A JP S56147047A JP 5047480 A JP5047480 A JP 5047480A JP 5047480 A JP5047480 A JP 5047480A JP S56147047 A JPS56147047 A JP S56147047A
Authority
JP
Japan
Prior art keywords
bits
data
bit
adder
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5047480A
Other languages
Japanese (ja)
Inventor
Hitoshi Sasabuchi
Ryusaburo Takeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5047480A priority Critical patent/JPS56147047A/en
Publication of JPS56147047A publication Critical patent/JPS56147047A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R33/00—Arrangements or instruments for measuring magnetic variables
    • G01R33/20—Arrangements or instruments for measuring magnetic variables involving magnetic resonance
    • G01R33/28—Details of apparatus provided for in groups G01R33/44 - G01R33/64

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To unify and simplify bit constitution by dividedly adding data bit, with the bit length smaller than the maximum bit length of memory stored data as a unit. CONSTITUTION:When the NMR signal is sampled and 12-bits data are inputted from an A/D converter 14 to an adder 16, a series of next processes are progressed by controlling of a sequence controller 20. Namely, the data of the lower 16 bits of 32 bits data from a memory 18 are read out from the address instructed by an address counter 22 and are inputted to the adder 16. The addition assumes the form 12 bits data + 16 bits data, hence, the adder 16, the memory 18 and input- output data bus lines 17, 19 are all unified to 16 bits. As a result, the transfer to a CPU24 is feasible with 16 bits unit and the bit constitution is made uniform and simple.
JP5047480A 1980-04-18 1980-04-18 Bit division type adder Pending JPS56147047A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5047480A JPS56147047A (en) 1980-04-18 1980-04-18 Bit division type adder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5047480A JPS56147047A (en) 1980-04-18 1980-04-18 Bit division type adder

Publications (1)

Publication Number Publication Date
JPS56147047A true JPS56147047A (en) 1981-11-14

Family

ID=12859887

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5047480A Pending JPS56147047A (en) 1980-04-18 1980-04-18 Bit division type adder

Country Status (1)

Country Link
JP (1) JPS56147047A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54159831A (en) * 1978-06-07 1979-12-18 Fujitsu Ltd Adder and subtractor for numbers different in data length using counter circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54159831A (en) * 1978-06-07 1979-12-18 Fujitsu Ltd Adder and subtractor for numbers different in data length using counter circuit

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