JPS56140444A - Microprogram control system - Google Patents

Microprogram control system

Info

Publication number
JPS56140444A
JPS56140444A JP4390880A JP4390880A JPS56140444A JP S56140444 A JPS56140444 A JP S56140444A JP 4390880 A JP4390880 A JP 4390880A JP 4390880 A JP4390880 A JP 4390880A JP S56140444 A JPS56140444 A JP S56140444A
Authority
JP
Japan
Prior art keywords
address
mupr
instruction
stack
indicated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4390880A
Other languages
Japanese (ja)
Other versions
JPS6250854B2 (en
Inventor
Takao Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4390880A priority Critical patent/JPS56140444A/en
Publication of JPS56140444A publication Critical patent/JPS56140444A/en
Publication of JPS6250854B2 publication Critical patent/JPS6250854B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE:To execute efficiently the microprogram muPR generated by structural programming, by giving all means, by which operations between the stack and muPR instruction address register AR are performed, to muPR instructions. CONSTITUTION:mu Instruction AR1 holds the address of muPR which is being executed, and contents of muPR memory 2 designated by this address are read out to mu instruction register RG3. Stack 4 is the least-in first-out type memory and stores address data temporarily, and the store position of the last data is indicated by stack pointer SP5. Operating circuit 6 performs a prescribed operation between the current instruction address indicated by AR1 and the firld of the mu instruction by the muPR instruction and writes the operation rsult into the address of stack 4 indicated by SP5. Branch control logic 8 performs the control together with address select gate 15 and RG3 to read data of the address in stack 5 designated by SP5 into AR1, and operating circuit 7 corrects data of SP5 into a value designated by the muPR instruction.
JP4390880A 1980-04-03 1980-04-03 Microprogram control system Granted JPS56140444A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4390880A JPS56140444A (en) 1980-04-03 1980-04-03 Microprogram control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4390880A JPS56140444A (en) 1980-04-03 1980-04-03 Microprogram control system

Publications (2)

Publication Number Publication Date
JPS56140444A true JPS56140444A (en) 1981-11-02
JPS6250854B2 JPS6250854B2 (en) 1987-10-27

Family

ID=12676807

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4390880A Granted JPS56140444A (en) 1980-04-03 1980-04-03 Microprogram control system

Country Status (1)

Country Link
JP (1) JPS56140444A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6020242A (en) * 1983-07-15 1985-02-01 Sony Corp Program control circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5474337A (en) * 1977-11-26 1979-06-14 Nec Corp Microprogram controller
JPS55934A (en) * 1978-06-20 1980-01-07 Nec Corp Microprogram controller

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5474337A (en) * 1977-11-26 1979-06-14 Nec Corp Microprogram controller
JPS55934A (en) * 1978-06-20 1980-01-07 Nec Corp Microprogram controller

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6020242A (en) * 1983-07-15 1985-02-01 Sony Corp Program control circuit
JPH0447851B2 (en) * 1983-07-15 1992-08-05 Sony Corp

Also Published As

Publication number Publication date
JPS6250854B2 (en) 1987-10-27

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