JPS5613832A - Programmable logic array - Google Patents

Programmable logic array

Info

Publication number
JPS5613832A
JPS5613832A JP8890279A JP8890279A JPS5613832A JP S5613832 A JPS5613832 A JP S5613832A JP 8890279 A JP8890279 A JP 8890279A JP 8890279 A JP8890279 A JP 8890279A JP S5613832 A JPS5613832 A JP S5613832A
Authority
JP
Japan
Prior art keywords
product
array
product term
term
row
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8890279A
Other languages
Japanese (ja)
Inventor
Hiroshi Mayumi
Kazuyoshi Tsuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8890279A priority Critical patent/JPS5613832A/en
Publication of JPS5613832A publication Critical patent/JPS5613832A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17764—Structural details of configuration resources for reliability

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To ensure the nondefectiveness in application of the programmable logic array as a whole even though some defect may exist, by providing the spare product term row. CONSTITUTION:In the product/sum-type field programmable logic array FPLA, the defective product term is ''killed'' to have no function by utilizing the fact that the function has no change even if the product term row may be replaced optionally and by providing previously spare product term row. In other words, a low level is given to the wiring of the product term row at the side of the product array. Programmable element C forms product array 10 (four product terms A1-A4 plus intersection between I1'/I1'' and I2'/I2'') as well as sum array 20 (A1-A4 plus intersections of outputs O1-O4). And in case some defect exists at the element of product term A1, the programming is first given to both elements on the line of the proper positive auxiliary inputs (such as I1' and I1'') among the normal elements at the product array side on product term A'. Thus those two elements are turned on. As a result, term A' is always set at a low level regardless of the input and gives no drive to the side of the sum array. In other words, the ''killing'' is carried out.
JP8890279A 1979-07-13 1979-07-13 Programmable logic array Pending JPS5613832A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8890279A JPS5613832A (en) 1979-07-13 1979-07-13 Programmable logic array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8890279A JPS5613832A (en) 1979-07-13 1979-07-13 Programmable logic array

Publications (1)

Publication Number Publication Date
JPS5613832A true JPS5613832A (en) 1981-02-10

Family

ID=13955875

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8890279A Pending JPS5613832A (en) 1979-07-13 1979-07-13 Programmable logic array

Country Status (1)

Country Link
JP (1) JPS5613832A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57211832A (en) * 1981-06-24 1982-12-25 Hitachi Ltd Programmable logic array
US5679418A (en) * 1995-11-07 1997-10-21 Kuraray Co., Ltd. Polyurethane and leather-like sheet utilizing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57211832A (en) * 1981-06-24 1982-12-25 Hitachi Ltd Programmable logic array
US5679418A (en) * 1995-11-07 1997-10-21 Kuraray Co., Ltd. Polyurethane and leather-like sheet utilizing the same

Similar Documents

Publication Publication Date Title
EP0340890A3 (en) Programmable logic device with array blocks connected via a programmable interconnect array
KR960704264A (en) PROGRAMMABLE LOGIC DEVICE WITH REGIONAL AND UNIVERSAL SIGNAL ROUTING
CA2022056A1 (en) Distributed memory architecture for a configurable logic array and method for using distributed memory
DE68924122D1 (en) Manufacturing process for semiconductor devices and transparent mask for the charged particle beam.
DE69031832T2 (en) PROGRAMMABLE LOGICAL GATES
DE3577953D1 (en) CIRCUIT FOR LOGIC GENERATION WITH MULTIPLEXERS.
JPH06224742A (en) Programmable logic device
KR950034747A (en) Custom Design Logic Array
GB1536374A (en) Programmable logic circuits
JPS5613832A (en) Programmable logic array
JPS56111194A (en) Semiconductor memory
DE3765695D1 (en) PROGRAMMABLE CIRCUIT ARRANGEMENT.
EP0280333A3 (en) Optical cross bar arithmetic/logic unit
JPS6418241A (en) Manufacture of integrated circuit
JPS6436120A (en) Redundant constitution gate array
KR100287538B1 (en) Programmable logic devices and configurable logic networks
JPS54123864A (en) Programmable logic array
DE68915891D1 (en) Superconducting photoconductive substance from the Ca-Sr-Bi-Cu-O system and manufacturing process.
DE3772163D1 (en) MODULE MANUFACTURED IN INTEGRATED TECHNOLOGY FOR THE CREATION OF INTEGRATED CIRCUITS.
ES2135700T3 (en) FOOTWEAR.
JPS56124930A (en) Initial program loader system
JPS5521652A (en) Logical integrated circuit
DE68911058D1 (en) Superconducting photoconductive substance from the Ba-Pb-Bi-O system and manufacturing process.
Jun International Forum on Appropriate Industrial Technology, Held at New Delhi/Anand, India on November 20-30, 1978. The Pharmaceutical Industry of the Republic of Korea
JPS5663605A (en) Optimum parameter search device of control unit