JPS56134864A - Direct-current interface circuit - Google Patents

Direct-current interface circuit

Info

Publication number
JPS56134864A
JPS56134864A JP3715980A JP3715980A JPS56134864A JP S56134864 A JPS56134864 A JP S56134864A JP 3715980 A JP3715980 A JP 3715980A JP 3715980 A JP3715980 A JP 3715980A JP S56134864 A JPS56134864 A JP S56134864A
Authority
JP
Japan
Prior art keywords
terminal
signal
bracketing
party
receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3715980A
Other languages
Japanese (ja)
Inventor
Akira Morimoto
Toshiyuki Taguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3715980A priority Critical patent/JPS56134864A/en
Publication of JPS56134864A publication Critical patent/JPS56134864A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/14—Two-way operation using the same type of signal, i.e. duplex
    • H04L5/16—Half-duplex systems; Simplex/duplex switching; Transmission of break signals non-automatically inverting the direction of transmission

Abstract

PURPOSE:To perform half-duplex communication by using a DC two-wire transmission line by short-circuiting the DC two-wire transmission line while varying a reference voltage by supplying a control signal from a control terminal to a reference power source circuit. CONSTITUTION:Once bracketing test information from a center is received, the potential at terminal E3 is varied and at the same time, switch 20 is short-circuited. In this case, a bracketing test can be taken regardless of the state of party-side transmitter-receiver 17. As well as communication with party-side transmitter-receiver 17, a binary signal is inputted to terminal E1 to change signal Ea between two values, and reference voltage Eb at that time is set to the intermediate value between those two values of signal Ea; and comparator 6 makes a voltage comparison and information from terminal 1 is outputted from terminal 2.
JP3715980A 1980-03-24 1980-03-24 Direct-current interface circuit Pending JPS56134864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3715980A JPS56134864A (en) 1980-03-24 1980-03-24 Direct-current interface circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3715980A JPS56134864A (en) 1980-03-24 1980-03-24 Direct-current interface circuit

Publications (1)

Publication Number Publication Date
JPS56134864A true JPS56134864A (en) 1981-10-21

Family

ID=12489811

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3715980A Pending JPS56134864A (en) 1980-03-24 1980-03-24 Direct-current interface circuit

Country Status (1)

Country Link
JP (1) JPS56134864A (en)

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