JPS56132826A - Phase locked loop - Google Patents

Phase locked loop

Info

Publication number
JPS56132826A
JPS56132826A JP3647580A JP3647580A JPS56132826A JP S56132826 A JPS56132826 A JP S56132826A JP 3647580 A JP3647580 A JP 3647580A JP 3647580 A JP3647580 A JP 3647580A JP S56132826 A JPS56132826 A JP S56132826A
Authority
JP
Japan
Prior art keywords
memory
frequency
check
pushed
transferred
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3647580A
Other languages
Japanese (ja)
Other versions
JPS6251543B2 (en
Inventor
Toshifumi Sakata
Kenichi Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3647580A priority Critical patent/JPS56132826A/en
Publication of JPS56132826A publication Critical patent/JPS56132826A/en
Publication of JPS6251543B2 publication Critical patent/JPS6251543B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J5/00Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
    • H03J5/02Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with variable tuning element having a number of predetermined settings and adjustable to a desired one of these settings
    • H03J5/0245Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form
    • H03J5/0272Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer
    • H03J5/0281Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer the digital values being held in an auxiliary non erasable memory

Abstract

PURPOSE:To obtain a controller of a PLL receiver which can write and call in a short time the frequency for adjusting a tracking or the frequency for checking a characteristic. CONSTITUTION:A controller of a PLL receiver shown in the figure 1 is constituted as shown in the figure 2. In the figure, when the specific switch 6 is pushed, the address controlling circuit 17, at first, designates a preset memory M1 and a check frequency memory a1, and the contents of the memory a1 are transferred to the memory M1. Subsequently, a memory M2 and a check frequency memory a2 are designated, and the same operation is repeated in order up to a memory Mn and the memory an. Accordingly, when the specific switch 6 is pushed in a regular receiving state, the check frequencies which are written in advance in the check frequency memories a1-an are transferred to the preset memories M1-Mn.
JP3647580A 1980-03-21 1980-03-21 Phase locked loop Granted JPS56132826A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3647580A JPS56132826A (en) 1980-03-21 1980-03-21 Phase locked loop

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3647580A JPS56132826A (en) 1980-03-21 1980-03-21 Phase locked loop

Publications (2)

Publication Number Publication Date
JPS56132826A true JPS56132826A (en) 1981-10-17
JPS6251543B2 JPS6251543B2 (en) 1987-10-30

Family

ID=12470833

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3647580A Granted JPS56132826A (en) 1980-03-21 1980-03-21 Phase locked loop

Country Status (1)

Country Link
JP (1) JPS56132826A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0496125U (en) * 1991-06-28 1992-08-20
JPH04105722U (en) * 1991-02-20 1992-09-11 三洋電機株式会社 Preset channel selection device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH035229U (en) * 1989-06-02 1991-01-18

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52113118A (en) * 1976-03-18 1977-09-22 Saibanetsuto Kougiyou Kk Emergency instantaneous communication system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52113118A (en) * 1976-03-18 1977-09-22 Saibanetsuto Kougiyou Kk Emergency instantaneous communication system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04105722U (en) * 1991-02-20 1992-09-11 三洋電機株式会社 Preset channel selection device
JPH0496125U (en) * 1991-06-28 1992-08-20

Also Published As

Publication number Publication date
JPS6251543B2 (en) 1987-10-30

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