JPS56129933A - Interface controller - Google Patents

Interface controller

Info

Publication number
JPS56129933A
JPS56129933A JP3158080A JP3158080A JPS56129933A JP S56129933 A JPS56129933 A JP S56129933A JP 3158080 A JP3158080 A JP 3158080A JP 3158080 A JP3158080 A JP 3158080A JP S56129933 A JPS56129933 A JP S56129933A
Authority
JP
Japan
Prior art keywords
circuit
control
control line
line
selection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3158080A
Other languages
Japanese (ja)
Inventor
Hiroshi Tanigaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3158080A priority Critical patent/JPS56129933A/en
Publication of JPS56129933A publication Critical patent/JPS56129933A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE:To reduce the control memory, by indicating and controlling the IF number to the signal line for RG and conditional judgement corresponding to each interface IF with the output of the register RG controlled with microinstruction. CONSTITUTION:When the microinstruction designates RG of the IF circuit 180 or 190 with the controllable modification RG 560, the RG number is given to the selection circuits 650, 651 via the control line 762, AND circut 580, and OR circuit 590. When RG is designated with the decoder 140, RG number is given to the circuts 650, 651 via the control line 142 and AND circuit 580. The selection of the control lines 181, 191 of the selection circuit 670 is controlled via RG 560 or control line 762. The circuit 670 selects the control line from the circuits 180, 190 and transmits it to test matrix TMX 660 via the control line 671. TMX 660 selects and tests one signal from the line 671 with the control of decoder 140, as a result the next address is set to the instruction address RG110. Thus, the routine relating to IF is made for each IF to common use, allowing to save the memory.
JP3158080A 1980-03-14 1980-03-14 Interface controller Pending JPS56129933A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3158080A JPS56129933A (en) 1980-03-14 1980-03-14 Interface controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3158080A JPS56129933A (en) 1980-03-14 1980-03-14 Interface controller

Publications (1)

Publication Number Publication Date
JPS56129933A true JPS56129933A (en) 1981-10-12

Family

ID=12335115

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3158080A Pending JPS56129933A (en) 1980-03-14 1980-03-14 Interface controller

Country Status (1)

Country Link
JP (1) JPS56129933A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63282559A (en) * 1987-05-06 1988-11-18 Fujitsu Ten Ltd Data transfer system
JPH0551241U (en) * 1990-10-02 1993-07-09 隆行 木村 Drying equipment for personal accessories

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63282559A (en) * 1987-05-06 1988-11-18 Fujitsu Ten Ltd Data transfer system
JPH0551241U (en) * 1990-10-02 1993-07-09 隆行 木村 Drying equipment for personal accessories

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