JPS56128090A - Data input method - Google Patents

Data input method

Info

Publication number
JPS56128090A
JPS56128090A JP3197380A JP3197380A JPS56128090A JP S56128090 A JPS56128090 A JP S56128090A JP 3197380 A JP3197380 A JP 3197380A JP 3197380 A JP3197380 A JP 3197380A JP S56128090 A JPS56128090 A JP S56128090A
Authority
JP
Japan
Prior art keywords
data
input device
data input
address
switchboard
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3197380A
Other languages
Japanese (ja)
Inventor
Hiroaki Takami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3197380A priority Critical patent/JPS56128090A/en
Publication of JPS56128090A publication Critical patent/JPS56128090A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme

Abstract

PURPOSE:To easily control a data input by directly inputting a data in the data input device to the data memory device, when the input device is connected to the switchboard by a mounting descrimination signal of the office data input device in which a setting element which can be visually confirmed is placed on the package. CONSTITUTION:When the office data input device A is mounted to the office data memory device B of the switchboard, a connection discriminating signal F becomes an ''L'' level, and it becomes an ''H'' level through the inverter. By this signal, and a clock pulse CP1 generated in the time zone which has been separated from other processing of the switchboard, the gate element G makes it possible to send out an output data of the input device A to the data bus. At the same time, an address data is sent out to the address bus E from the address generation unit C, and the address is designated. Subsequently, the data is written in the memory device B by the clock pulse CP1, the pulse CP2 synchronizing with said pulse, and the discriminating signal F.
JP3197380A 1980-03-13 1980-03-13 Data input method Pending JPS56128090A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3197380A JPS56128090A (en) 1980-03-13 1980-03-13 Data input method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3197380A JPS56128090A (en) 1980-03-13 1980-03-13 Data input method

Publications (1)

Publication Number Publication Date
JPS56128090A true JPS56128090A (en) 1981-10-07

Family

ID=12345885

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3197380A Pending JPS56128090A (en) 1980-03-13 1980-03-13 Data input method

Country Status (1)

Country Link
JP (1) JPS56128090A (en)

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