JPS56124931A - Information processing device - Google Patents

Information processing device

Info

Publication number
JPS56124931A
JPS56124931A JP2873780A JP2873780A JPS56124931A JP S56124931 A JPS56124931 A JP S56124931A JP 2873780 A JP2873780 A JP 2873780A JP 2873780 A JP2873780 A JP 2873780A JP S56124931 A JPS56124931 A JP S56124931A
Authority
JP
Japan
Prior art keywords
substrates
priority
pcb3
detected
tune
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2873780A
Other languages
Japanese (ja)
Inventor
Takashi Minagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2873780A priority Critical patent/JPS56124931A/en
Publication of JPS56124931A publication Critical patent/JPS56124931A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/368—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control
    • G06F13/37—Handling requests for interconnection or transfer for access to common bus or bus system with decentralised access control using a physical-position-dependent priority, e.g. daisy chain, round robin or token passing

Abstract

PURPOSE:To prevent the priority tune from being disconnected, by automatically connecting the priority tune when removal of the printed substrate has been detected. CONSTITUTION:Processing printed substrates 2-3 and channel printed substrates 4-12 are inserted into the mother board 1 of the information processing device. These substrates 2-12 are electrically connected to the priority tunes PRT1, PRT2 so as to correspond to the printed substrates PCB1-PCB3. And, when removal of the substrates PCB1-PCB3 is detected by the detection member DET, and this detection member DET has detected insertion or drawing-out of the substrates PCB1-PCB3, the connecting element CON is automatically turned off or on. For instance, when the substrate PCB2 is drawn out, the connecting element CON is turned on, and the priority tune PRT1 and PRT2 are connected so that the priority tune is not disconnected from the processing part.
JP2873780A 1980-03-07 1980-03-07 Information processing device Pending JPS56124931A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2873780A JPS56124931A (en) 1980-03-07 1980-03-07 Information processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2873780A JPS56124931A (en) 1980-03-07 1980-03-07 Information processing device

Publications (1)

Publication Number Publication Date
JPS56124931A true JPS56124931A (en) 1981-09-30

Family

ID=12256730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2873780A Pending JPS56124931A (en) 1980-03-07 1980-03-07 Information processing device

Country Status (1)

Country Link
JP (1) JPS56124931A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5924327A (en) * 1982-07-30 1984-02-08 Hitachi Ltd Decentralized priority selecting device
WO1989004015A1 (en) * 1987-10-22 1989-05-05 Fanuc Ltd Multi-master bus system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5175347A (en) * 1974-12-26 1976-06-29 Fujitsu Ltd

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5175347A (en) * 1974-12-26 1976-06-29 Fujitsu Ltd

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5924327A (en) * 1982-07-30 1984-02-08 Hitachi Ltd Decentralized priority selecting device
WO1989004015A1 (en) * 1987-10-22 1989-05-05 Fanuc Ltd Multi-master bus system

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