JPS56123023A - Power supply controlling system - Google Patents
Power supply controlling systemInfo
- Publication number
- JPS56123023A JPS56123023A JP2406580A JP2406580A JPS56123023A JP S56123023 A JPS56123023 A JP S56123023A JP 2406580 A JP2406580 A JP 2406580A JP 2406580 A JP2406580 A JP 2406580A JP S56123023 A JPS56123023 A JP S56123023A
- Authority
- JP
- Japan
- Prior art keywords
- storage device
- external storage
- processor
- signal
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
- Direct Current Feeding And Distribution (AREA)
Abstract
PURPOSE:To prevent the noise of the cooling fan motor and a waste of electric power when the external storage device is not used, by supplying power to the external storage device only when the processor uses the external storage device. CONSTITUTION:When power source 19 of processor 1 is made, power supply detecting circuit 5 detects DC voltage signal 7 to generate detection signal 23 on signal line 9. Processor 1 receives this detection signal to transmit the relay driving signal to relay controlling circuit 3 through signal line 13, and relay switch 4 is turned on to supply power to external storage device 2. If a medium is inserted into external storage device 2, control siganl 25 rises on control signal line 12, and processor 1 detects this signal to execute data transfer. If the medium is not inserted into external storage device 2, control signal 25 does not rise, and therefore, processor 1 sets external storage device 2 to the power supply state and is held for a prescribed time until device 2 becomes available.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55024065A JPS5818643B2 (en) | 1980-02-29 | 1980-02-29 | Power control method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55024065A JPS5818643B2 (en) | 1980-02-29 | 1980-02-29 | Power control method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56123023A true JPS56123023A (en) | 1981-09-26 |
JPS5818643B2 JPS5818643B2 (en) | 1983-04-14 |
Family
ID=12128035
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55024065A Expired JPS5818643B2 (en) | 1980-02-29 | 1980-02-29 | Power control method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5818643B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9007864B2 (en) | 2010-03-16 | 2015-04-14 | Panasonic Intellectual Property Management Co., Ltd. | Information processing apparatus, nonvolatile storage device, information porcessing system and nonvolatile memory controller |
-
1980
- 1980-02-29 JP JP55024065A patent/JPS5818643B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9007864B2 (en) | 2010-03-16 | 2015-04-14 | Panasonic Intellectual Property Management Co., Ltd. | Information processing apparatus, nonvolatile storage device, information porcessing system and nonvolatile memory controller |
Also Published As
Publication number | Publication date |
---|---|
JPS5818643B2 (en) | 1983-04-14 |
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