JPS56122257A - High-level data link control device for secondary station - Google Patents

High-level data link control device for secondary station

Info

Publication number
JPS56122257A
JPS56122257A JP2544780A JP2544780A JPS56122257A JP S56122257 A JPS56122257 A JP S56122257A JP 2544780 A JP2544780 A JP 2544780A JP 2544780 A JP2544780 A JP 2544780A JP S56122257 A JPS56122257 A JP S56122257A
Authority
JP
Japan
Prior art keywords
frame
receiving
control device
data link
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2544780A
Other languages
Japanese (ja)
Inventor
Shiro Sakata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2544780A priority Critical patent/JPS56122257A/en
Publication of JPS56122257A publication Critical patent/JPS56122257A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To improve the data transfer efficiency, by performing normalcy decision of the transmission request and the receiving report required for the timing control by one FF, three AND elements, and one NOT element. CONSTITUTION:Communication line transmission control part 4 and communication line receiving control part 5 are connected to data processing part 1 through frame transmission control circuit 2. FF6 for holding the transfer state is connected to frame transmission control circuit 2, and a high-level data link control device is formed by AND elements 9 and 10 for controlling the frame transmission request state transition and the frame receiving report state transition, AND element 11 for normalcy decision of the frame receiving report, and NOT element 8 for normalcy decision of the frame transmission request. By this constitution, the timing of data transmission and receiving is controlled to transmit data with a high efficiency.
JP2544780A 1980-02-29 1980-02-29 High-level data link control device for secondary station Pending JPS56122257A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2544780A JPS56122257A (en) 1980-02-29 1980-02-29 High-level data link control device for secondary station

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2544780A JPS56122257A (en) 1980-02-29 1980-02-29 High-level data link control device for secondary station

Publications (1)

Publication Number Publication Date
JPS56122257A true JPS56122257A (en) 1981-09-25

Family

ID=12166260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2544780A Pending JPS56122257A (en) 1980-02-29 1980-02-29 High-level data link control device for secondary station

Country Status (1)

Country Link
JP (1) JPS56122257A (en)

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