JPS56120277A - Signal selection circuit - Google Patents
Signal selection circuitInfo
- Publication number
- JPS56120277A JPS56120277A JP2341480A JP2341480A JPS56120277A JP S56120277 A JPS56120277 A JP S56120277A JP 2341480 A JP2341480 A JP 2341480A JP 2341480 A JP2341480 A JP 2341480A JP S56120277 A JPS56120277 A JP S56120277A
- Authority
- JP
- Japan
- Prior art keywords
- input
- output
- subsignals
- main
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
- H04N5/60—Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals
- H04N5/607—Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals for more than one sound signal, e.g. stereo, multilanguages
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Receiver Circuits (AREA)
- Control Of Amplification And Gain Control (AREA)
Abstract
PURPOSE:To automatically select an input signal, by connecting a comparator to the output of an interlocking variable rheostat where the main and subsignals are input, and controlling switching circuit with this output. CONSTITUTION:Main and subsignals are input to input terminals 21, 22 of an interlocking variable rheostat 23. At the output terminal which is controlled reverse to the same directional operation of the variable rheostat 23, a comparator 30 detecting the output difference is connected. Further, when a switch 32 is opened, the switching circuit 31 is in short circuit if the output difference between the sliders d1 and d2 rised to a given level or more, and a signal greater between the main and subsignals is fed to the input terminal of the amplifiers 26, 27, and either one signal is reproduced from speakers 28, 29 at the same time.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2341480A JPS56120277A (en) | 1980-02-28 | 1980-02-28 | Signal selection circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2341480A JPS56120277A (en) | 1980-02-28 | 1980-02-28 | Signal selection circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56120277A true JPS56120277A (en) | 1981-09-21 |
Family
ID=12109829
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2341480A Pending JPS56120277A (en) | 1980-02-28 | 1980-02-28 | Signal selection circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56120277A (en) |
-
1980
- 1980-02-28 JP JP2341480A patent/JPS56120277A/en active Pending
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