JPS5611684A - Competition control circuit - Google Patents
Competition control circuitInfo
- Publication number
- JPS5611684A JPS5611684A JP8612779A JP8612779A JPS5611684A JP S5611684 A JPS5611684 A JP S5611684A JP 8612779 A JP8612779 A JP 8612779A JP 8612779 A JP8612779 A JP 8612779A JP S5611684 A JPS5611684 A JP S5611684A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- received
- control circuit
- competition
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000002860 competitive effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Electronic Switches (AREA)
Abstract
PURPOSE:To obtain the competition control circuit independently of the clock, by setting FF with the first signal and the second inversion signal and setting other FF with the reset signal of FF and the second delay signal. CONSTITUTION:The signal A of read or write sets FFF5 via the AND gate G3 opened via the inverter I when the refresh signal B in competition with the signal A is absent, for the reception of the signal A. Further, the reset output of FF5 is inverted and the AND gate G4 is closed, then even if the signal B via the delay circuit DL which performs delay operation until the reset output is made stable is generated, the flip-flop F6 is not set and the signal B is not received. If the signal B is generated ahead and received, the signal A is not received, allowing to perform sure competitive control for the asynchronous signal without using clock.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8612779A JPS5611684A (en) | 1979-07-06 | 1979-07-06 | Competition control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8612779A JPS5611684A (en) | 1979-07-06 | 1979-07-06 | Competition control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5611684A true JPS5611684A (en) | 1981-02-05 |
| JPS6158052B2 JPS6158052B2 (en) | 1986-12-10 |
Family
ID=13878033
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8612779A Granted JPS5611684A (en) | 1979-07-06 | 1979-07-06 | Competition control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5611684A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57176592A (en) * | 1981-04-24 | 1982-10-29 | Hitachi Ltd | Memory device |
-
1979
- 1979-07-06 JP JP8612779A patent/JPS5611684A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57176592A (en) * | 1981-04-24 | 1982-10-29 | Hitachi Ltd | Memory device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6158052B2 (en) | 1986-12-10 |
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