JPS5278327A - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number
JPS5278327A
JPS5278327A JP50155664A JP15566475A JPS5278327A JP S5278327 A JPS5278327 A JP S5278327A JP 50155664 A JP50155664 A JP 50155664A JP 15566475 A JP15566475 A JP 15566475A JP S5278327 A JPS5278327 A JP S5278327A
Authority
JP
Japan
Prior art keywords
semiconductor memory
memory
flop
interrupting
mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP50155664A
Other languages
Japanese (ja)
Inventor
Yutaka Mizoguchi
Moriyuki Takamura
Megumi Tsuru
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP50155664A priority Critical patent/JPS5278327A/en
Publication of JPS5278327A publication Critical patent/JPS5278327A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors

Abstract

PURPOSE:To prevent destroy of MOS-IC memory's memory cell in case both reset and clock signals take place simultaneously, by interrupting the both signals at gate with setting of flip-flop.
JP50155664A 1975-12-24 1975-12-24 Semiconductor memory Pending JPS5278327A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50155664A JPS5278327A (en) 1975-12-24 1975-12-24 Semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50155664A JPS5278327A (en) 1975-12-24 1975-12-24 Semiconductor memory

Publications (1)

Publication Number Publication Date
JPS5278327A true JPS5278327A (en) 1977-07-01

Family

ID=15610883

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50155664A Pending JPS5278327A (en) 1975-12-24 1975-12-24 Semiconductor memory

Country Status (1)

Country Link
JP (1) JPS5278327A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61126683A (en) * 1984-11-22 1986-06-14 Toshiba Corp Semiconductor memory device
JPS6452286A (en) * 1988-06-17 1989-02-28 Nec Corp Memory circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61126683A (en) * 1984-11-22 1986-06-14 Toshiba Corp Semiconductor memory device
JPS6452286A (en) * 1988-06-17 1989-02-28 Nec Corp Memory circuit
JPH0330237B2 (en) * 1988-06-17 1991-04-26

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