JPS5211830A - Memory contpol unit - Google Patents

Memory contpol unit

Info

Publication number
JPS5211830A
JPS5211830A JP8873275A JP8873275A JPS5211830A JP S5211830 A JPS5211830 A JP S5211830A JP 8873275 A JP8873275 A JP 8873275A JP 8873275 A JP8873275 A JP 8873275A JP S5211830 A JPS5211830 A JP S5211830A
Authority
JP
Japan
Prior art keywords
memory
contpol
unit
mnos
mos
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8873275A
Other languages
Japanese (ja)
Inventor
Kazumi Kawashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8873275A priority Critical patent/JPS5211830A/en
Publication of JPS5211830A publication Critical patent/JPS5211830A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:Reduction of the number of elements of the memory circuit by constituting one bit memory with one MNOS and two MOS's.
JP8873275A 1975-07-18 1975-07-18 Memory contpol unit Pending JPS5211830A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8873275A JPS5211830A (en) 1975-07-18 1975-07-18 Memory contpol unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8873275A JPS5211830A (en) 1975-07-18 1975-07-18 Memory contpol unit

Publications (1)

Publication Number Publication Date
JPS5211830A true JPS5211830A (en) 1977-01-29

Family

ID=13951082

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8873275A Pending JPS5211830A (en) 1975-07-18 1975-07-18 Memory contpol unit

Country Status (1)

Country Link
JP (1) JPS5211830A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53145184A (en) * 1977-05-24 1978-12-18 Nachi Fujikoshi Corp Device for lifting and inverting broach holder mounting base of continuous broaching machine

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53145184A (en) * 1977-05-24 1978-12-18 Nachi Fujikoshi Corp Device for lifting and inverting broach holder mounting base of continuous broaching machine
JPS5815248B2 (en) * 1977-05-24 1983-03-24 株式会社不二越 Continuous broaching machine broach holder mounting stand lifting and reversing device

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