JPS56116144A - Memory system of loop transmission - Google Patents

Memory system of loop transmission

Info

Publication number
JPS56116144A
JPS56116144A JP1762780A JP1762780A JPS56116144A JP S56116144 A JPS56116144 A JP S56116144A JP 1762780 A JP1762780 A JP 1762780A JP 1762780 A JP1762780 A JP 1762780A JP S56116144 A JPS56116144 A JP S56116144A
Authority
JP
Japan
Prior art keywords
information
stored
renewal
schedule
loop transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1762780A
Other languages
Japanese (ja)
Other versions
JPH0158599B2 (en
Inventor
Shinji Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1762780A priority Critical patent/JPS56116144A/en
Publication of JPS56116144A publication Critical patent/JPS56116144A/en
Publication of JPH0158599B2 publication Critical patent/JPH0158599B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Small-Scale Networks (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

PURPOSE:To prevent delay in the transmission and processing at renewal, by erasing the information having renewal schedule from the loop transmission path out of the signal transferred endless in the path and avoiding it from being informed to others. CONSTITUTION:202, 204, 206, 212, 216, 222, 224, 226 are headers to distinguish the types of information to be stored and 201, 203, 205, 211, 215, 221, 223, 225 are signals indicating the information stored. Three signal groups shown in (a) have no schedule of renewal, and they are transmitted endless in the transmission path and stored. After that, if there is any schedule to renew the content stored as 203, the terminal device erases the header 204 relating to this information and the content 203. Further, when the processing of 203 is finished at the information processor, the information as the result is stored and written in the loop transmission path again.
JP1762780A 1980-02-15 1980-02-15 Memory system of loop transmission Granted JPS56116144A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1762780A JPS56116144A (en) 1980-02-15 1980-02-15 Memory system of loop transmission

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1762780A JPS56116144A (en) 1980-02-15 1980-02-15 Memory system of loop transmission

Publications (2)

Publication Number Publication Date
JPS56116144A true JPS56116144A (en) 1981-09-11
JPH0158599B2 JPH0158599B2 (en) 1989-12-12

Family

ID=11949098

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1762780A Granted JPS56116144A (en) 1980-02-15 1980-02-15 Memory system of loop transmission

Country Status (1)

Country Link
JP (1) JPS56116144A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011523120A (en) * 2008-05-07 2011-08-04 タジツ トランスファー リミテッド ライアビリティ カンパニー Deletion in data file transfer framework
JP2011528141A (en) * 2008-07-10 2011-11-10 タジツ トランスファー リミテッド ライアビリティ カンパニー Ad transfer storage and retrieval network
JP2012504285A (en) * 2008-09-29 2012-02-16 タジツ トランスファー リミテッド ライアビリティ カンパニー Geolocation support data transfer storage
JP2012504372A (en) * 2008-09-29 2012-02-16 タジツ トランスファー リミテッド ライアビリティ カンパニー Encryption rotation in data transfer storage
JP2012504282A (en) * 2008-09-29 2012-02-16 タジツ トランスファー リミテッド ライアビリティ カンパニー Selective data transfer storage
US9961144B2 (en) 2008-03-20 2018-05-01 Callahan Cellular L.L.C. Data storage and retrieval

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54163632A (en) * 1978-06-15 1979-12-26 Fujitsu Ltd Space memory system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54163632A (en) * 1978-06-15 1979-12-26 Fujitsu Ltd Space memory system

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9961144B2 (en) 2008-03-20 2018-05-01 Callahan Cellular L.L.C. Data storage and retrieval
JP2011523120A (en) * 2008-05-07 2011-08-04 タジツ トランスファー リミテッド ライアビリティ カンパニー Deletion in data file transfer framework
JP2011528141A (en) * 2008-07-10 2011-11-10 タジツ トランスファー リミテッド ライアビリティ カンパニー Ad transfer storage and retrieval network
JP2012504285A (en) * 2008-09-29 2012-02-16 タジツ トランスファー リミテッド ライアビリティ カンパニー Geolocation support data transfer storage
JP2012504372A (en) * 2008-09-29 2012-02-16 タジツ トランスファー リミテッド ライアビリティ カンパニー Encryption rotation in data transfer storage
JP2012504282A (en) * 2008-09-29 2012-02-16 タジツ トランスファー リミテッド ライアビリティ カンパニー Selective data transfer storage

Also Published As

Publication number Publication date
JPH0158599B2 (en) 1989-12-12

Similar Documents

Publication Publication Date Title
FR2474721B1 (en) MEMORY MEMORY DEVICE
DE3481459D1 (en) DEVICE FOR PLAYING SIGNAL DATA.
JPS56116144A (en) Memory system of loop transmission
JPS5248425A (en) Receiving system of facsimile signal
JPS5392613A (en) Data transmission system
FR2516342B1 (en) HAY CONDITIONING DEVICE FOR MOWERS
FR2492204B1 (en) METHOD AND DEVICE FOR TRANSMITTING AND RECORDING DATA WITH REDUCED DATA RATE
JPS545343A (en) Micro program processing system
JPS56110125A (en) Data processing device
FR2478912B1 (en) BUFFER MEMORY, ESPECIALLY FOR AN ELECTRONIC COUNTER-MEASUREMENT DEVICE
JPS5265628A (en) Information processing device
BE888281A (en) LOGICAL TYPE ADDRESS GAME DEVICE,
FR2527880B1 (en) WRITING DEVICE FOR MEMORY CIRCUIT
JPS56116138A (en) Input and output controller
JPS56135261A (en) Interprocessor information transfer system
JPS5431222A (en) Character information memory system
JPS57184354A (en) Digital transmitter
JPS5372428A (en) Data renewal system
JPS5752933A (en) Input and output control system
JPS5443433A (en) Memory element designation system
JPS5769971A (en) Video information processing system
JPS5750378A (en) Control system of data processor
JPS5387137A (en) Data processing system
JPS57119543A (en) Control station device
JPS52104024A (en) Information check system