JPS56111185A - Semiconductor integrated memory cell - Google Patents

Semiconductor integrated memory cell

Info

Publication number
JPS56111185A
JPS56111185A JP1274580A JP1274580A JPS56111185A JP S56111185 A JPS56111185 A JP S56111185A JP 1274580 A JP1274580 A JP 1274580A JP 1274580 A JP1274580 A JP 1274580A JP S56111185 A JPS56111185 A JP S56111185A
Authority
JP
Japan
Prior art keywords
capacitance
storage
memory cell
fett2
dynamic ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1274580A
Other languages
Japanese (ja)
Inventor
Tadahide Takada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1274580A priority Critical patent/JPS56111185A/en
Publication of JPS56111185A publication Critical patent/JPS56111185A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To establish the static memory cell of samll size and low power, by giving the automatic refresh function to one transistor type dynamic RAM with IGFET, gate contage control capacitance and diodes. CONSTITUTION:One transistor dynamic RAM is formed with IGFETT2 forming storage capacitance, and IGFETT1 connected to the word and dot lines W and B, and when the storage by FETT2 is at 1 and the node N1 is at high level, IGFETT30 is ON and the charge is injected to the gate electrode of a gate voltage control type capacitance CG. Further, when the refresh signal line R is at high level, precharge by the electrode of the capacitance CG in higher level than the storage electrode of FETT2 through capacitance coupling via diodes D. On the other hand, when the storage by FETT2 is at 0, FETT1 is conductive and no charge supply is made. Through the provision of automatic refresh function to one transistor type dynamic RAM, the static memory cell can be of small size and low power.
JP1274580A 1980-02-05 1980-02-05 Semiconductor integrated memory cell Pending JPS56111185A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1274580A JPS56111185A (en) 1980-02-05 1980-02-05 Semiconductor integrated memory cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1274580A JPS56111185A (en) 1980-02-05 1980-02-05 Semiconductor integrated memory cell

Publications (1)

Publication Number Publication Date
JPS56111185A true JPS56111185A (en) 1981-09-02

Family

ID=11813953

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1274580A Pending JPS56111185A (en) 1980-02-05 1980-02-05 Semiconductor integrated memory cell

Country Status (1)

Country Link
JP (1) JPS56111185A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0078398A2 (en) * 1981-10-29 1983-05-11 International Business Machines Corporation Fet Memory with refresh
US5594698A (en) * 1993-03-17 1997-01-14 Zycad Corporation Random access memory (RAM) based configurable arrays

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5152745A (en) * 1974-09-09 1976-05-10 Rockwell International Corp Memorisadohoho oyobi rifuretsushukurotsukushingohatsuseisochi

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5152745A (en) * 1974-09-09 1976-05-10 Rockwell International Corp Memorisadohoho oyobi rifuretsushukurotsukushingohatsuseisochi

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0078398A2 (en) * 1981-10-29 1983-05-11 International Business Machines Corporation Fet Memory with refresh
US5594698A (en) * 1993-03-17 1997-01-14 Zycad Corporation Random access memory (RAM) based configurable arrays

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