JPS56102118A - Digital to analog converting circuit - Google Patents

Digital to analog converting circuit

Info

Publication number
JPS56102118A
JPS56102118A JP461080A JP461080A JPS56102118A JP S56102118 A JPS56102118 A JP S56102118A JP 461080 A JP461080 A JP 461080A JP 461080 A JP461080 A JP 461080A JP S56102118 A JPS56102118 A JP S56102118A
Authority
JP
Japan
Prior art keywords
dac3
inputs
bits
output
converting circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP461080A
Other languages
Japanese (ja)
Inventor
Tsutomu Noda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP461080A priority Critical patent/JPS56102118A/en
Publication of JPS56102118A publication Critical patent/JPS56102118A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/70—Automatic control for modifying converter range

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To make it possible to perform D/A conversion efficiently, by changing the gain of variable gain amplifier connected to the output of converting circuit by an amount corresponding to the shifted number of bits. CONSTITUTION:Digital code comparison 18 is performed on input of upper bits 4-6, and, when the absolute value of signal amplitude is less than 1/4 of the maximum value of 14-bit signal, upper bit from input 4 of equivalent inputs 4- 6 is applied to DAC input 19 of the most significant bit of DA converting circuit DAC3, and connect inputs inputs 7-17 to DAC inputs 26-30 of DAC3 and then lead the output of DAC3 to terminal 34. On the other hand, when the absolute value of signal amplitude is more than 1/4 of the maximum value of 14-bit signal, the codes of upper 3 bits do not coincide to each other, and 12 bits of inputs 4-15 are applied to DAC inputs 19-30 of DAC3 and, at the same time, the output of DAC3 is outputted 34 after it is amplified with variable gain amplifier 32. By this, D/A conversion can be performed efficiently by changing the gain of amplifier 32 connected to the output of DAC3 by an amount corresponding to the shifted number of bits.
JP461080A 1980-01-21 1980-01-21 Digital to analog converting circuit Pending JPS56102118A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP461080A JPS56102118A (en) 1980-01-21 1980-01-21 Digital to analog converting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP461080A JPS56102118A (en) 1980-01-21 1980-01-21 Digital to analog converting circuit

Publications (1)

Publication Number Publication Date
JPS56102118A true JPS56102118A (en) 1981-08-15

Family

ID=11588812

Family Applications (1)

Application Number Title Priority Date Filing Date
JP461080A Pending JPS56102118A (en) 1980-01-21 1980-01-21 Digital to analog converting circuit

Country Status (1)

Country Link
JP (1) JPS56102118A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58164315A (en) * 1982-03-25 1983-09-29 Nippon Gakki Seizo Kk Digital-analog converter
JPS61242421A (en) * 1985-04-19 1986-10-28 Nippon Gakki Seizo Kk Digital-analog converter
JPS6348919A (en) * 1986-08-19 1988-03-01 Fujitsu Ltd Automatic gain control system by digital signal processor
JPS6380626A (en) * 1986-09-24 1988-04-11 Yamaha Corp Digital/analog converter
WO1991003105A1 (en) * 1989-08-21 1991-03-07 Fujitsu Limited Digital-to-analog converter
WO2004042931A3 (en) * 2002-11-06 2004-09-23 Toumaz Technology Ltd Configurable function implementing system and digital to analogue converters

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54101076A (en) * 1978-01-26 1979-08-09 Nec Corp Digital program voltage generator
JPS5563124A (en) * 1978-11-02 1980-05-13 Victor Co Of Japan Ltd D-a converter circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54101076A (en) * 1978-01-26 1979-08-09 Nec Corp Digital program voltage generator
JPS5563124A (en) * 1978-11-02 1980-05-13 Victor Co Of Japan Ltd D-a converter circuit

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58164315A (en) * 1982-03-25 1983-09-29 Nippon Gakki Seizo Kk Digital-analog converter
JPS61242421A (en) * 1985-04-19 1986-10-28 Nippon Gakki Seizo Kk Digital-analog converter
JPS6348919A (en) * 1986-08-19 1988-03-01 Fujitsu Ltd Automatic gain control system by digital signal processor
JPS6380626A (en) * 1986-09-24 1988-04-11 Yamaha Corp Digital/analog converter
WO1991003105A1 (en) * 1989-08-21 1991-03-07 Fujitsu Limited Digital-to-analog converter
US5307065A (en) * 1989-08-21 1994-04-26 Fujitsu Limited Digital-to-analog converter
WO2004042931A3 (en) * 2002-11-06 2004-09-23 Toumaz Technology Ltd Configurable function implementing system and digital to analogue converters
GB2409941A (en) * 2002-11-06 2005-07-13 Toumaz Technology Ltd Configurable function implementing system and digital to analogue converters
GB2409941B (en) * 2002-11-06 2006-04-05 Toumaz Technology Ltd Configurable function implementing system and digital to analogue converters

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