JPS6348919A - Automatic gain control system by digital signal processor - Google Patents

Abstract

PURPOSE:To decrease the processing cycle by dividing the dynamic range of a signal inputted to a processor into plural blocks, setting the number of shifts in advance to them and shifting the amplitude maximum value in a frame obtained by applying window processing to the input signal series in response to the setting value. CONSTITUTION:The changing range of the amplitude of an input signal inputted to a digital signal processing processor, that is, the dynamic range is split into plural blocks such as the 1st-4th blocks, and a shift number of the output value corresponding to the input value corresponding to each block is preset. Further, the window processing is applied to the input signal series, to section the block into a frame having n-sample value and the maximum value of the signal amplitude in the frame is checked and the entire n-sample is shifted equally by the number of shifts decided to the block to which the maximum value in the frame belongs.

Description

[Detailed Description of the Invention] [Summary] When digitally processing an input signal whose amplitude constantly changes, such as an audio signal, an automatic gain adjustment method automatically adjusts the gain in the digital processing process. Processor (Digital
The dynamic range of the signal input to the Signal Processor) is divided into multiple blocks, and the number of shifts for each of these blocks is set in advance, so that the input signal sequence is within the windowed frame range. Depending on which block the maximum amplitude included in belongs to, the bit shift is performed by the preset number of shifts, and automatic gain adjustment (AGC) is performed by bit shifting without performing division in the digital signal processing processor. ).

[Industrial application field]

The present invention relates to an automatic gain adjustment method using a digital signal processing processor.

[Conventional technology]

Some digital signal processors (hereinafter abbreviated as DSP) are capable of division, while others are not.

Even if [division] γ is possible, the processing time will be long because the number of processing cycles required for division is large.
Division is not desirable for DSPs.

Conventionally, when attempting to perform automatic gain adjustment using a DSP, the maximum value of the signal amplitude in a frame consisting of n samples formed by applying windowing processing to the input signal sequence is xmaxss, and the optimal amplitude value is A. Since automatic gain adjustment is performed by performing the calculation Xn □ Xmax on the human input signal Xn in the frame, the calculation includes division.

[Problem that the invention seeks to solve]

Conventionally, when automatic gain adjustment is performed using a DSP, division is included in the calculation, which causes problems such as an increase in the number of processing cycles for the division and a long processing time.

SUMMARY OF THE INVENTION An object of the present invention is to provide an automatic gain adjustment method using a digital signal processor that performs automatic gain adjustment by bit shifting without performing division in a DSP.

[Means for solving problems]

As shown in the principle explanatory diagram in Fig. 1, the dynamic range (amplitude change range) of the input signal input to the DSP is divided into the first, second, and third blocks depending on the amplitude. If the data is divided into a plurality of blocks, the number of shifts of the output value relative to the input value is set in advance for each of these blocks.

Furthermore, by performing windowing processing on the input signal sequence, it is divided into frames having n sample values, the maximum value of the signal amplitude within this frame (assumed to be Xma) is checked, and the maximum value within the above frame (Xmax ) The gain adjustment is performed by uniformly shifting all n samples by the number of shifts determined for the block to which the block belongs.

[For production]

In Fig. 1, when the dynamic range of the input signal is sufficient without performing gain adjustment, that is, the amplitude of the input signal is sufficiently large, and the maximum value of the signal amplitude (Xmax) included in the above frame is If this belongs to the first block, the preset shift number for the first block is 0, so no bit shifting is performed for all n samples of the frame.

FIG. 2 [a+ shows the state at this time. In this example, the maximum value of the amplitude in the human input signal is the first value shown in Figure 1.
This shows the case where Xmax=6000 (hexadecimal number) belonging to bronc. At this time, since no bit shift is performed, there is no change in the bit string of the output value relative to the input value. That is, in this case, the output value is equal to the input value.

Also, the maximum amplitude of the input signal included in the frame (
Xmax) belongs to the second block,
The preset number of shifts for this second block is 1.
Therefore, a bit shift of 1 bit to the left is performed for all n samples of the above-mentioned frame.

The state at this time is shown in FIG. 2 (bl).

This example shows the case where the maximum value of the amplitude in the input signal is Xmax = 3000 (hexadecimal) belonging to the second block shown in FIG. At this time, since the preset shift number for the second block is 1,
A bit shift of one bit to the left is performed for all n samples. Therefore, in this case, the output value with respect to the input value has been gain adjusted to be twice.

Similarly to the above, the maximum value (Xmax) of the amplitude of the input signal included in each frame is determined by the third . Fourth
If it belongs to a block, by shifting the bit string corresponding to the input value by 2 bits and 3 bits to the left, respectively, it is possible to adjust the gain of the output value to 4 times and 8 times, respectively, with respect to the input value.

In addition, in the above explanation, the gain adjustment was explained when increasing the output value by shifting the bit string for the input value to the left, but it is also possible to decrease the output value by shifting the bit string for the human input value to the right. The gain can also be adjusted.

〔Example〕

For example, as a method of configuring a digital delay equalizer using a DSP, there is a method using fast Fourier transform (FFT). When performing this fast Fourier transform, overflow and underflow are likely to occur because the number of calculations is large.

Therefore, if a calculation for fast Fourier transform is directly performed on the A/D conversion conversion ratio, the S/N will deteriorate significantly.

FIG. 3 is a block diagram of a digital delay equalizer to which the automatic gain adjustment method of the present invention is applied before performing the calculation for the above-mentioned fast Fourier transform.

An analog input signal is converted into a digital signal by an A/D converter 1. This A/D converted signal is divided into n parallel signals, gain adjusted by AGC circuits 31 to 30, and then fast Fourier transformed by fast Fourier transformers 4I to 4n.

Next, equalization processing circuit 5. ~5n, the inverse fast Fourier transformers 61~6n, and the above-mentioned AGC circuit 3. ~3n
n parallel signals are superimposed and added through inverse AGC circuits 71 to 7n having characteristics opposite to the above, and are converted into analog signals by the D/A converter 8 and taken out as analog output signals.

Note that the AGC circuits 31 to 3n and the inverse AGC circuits 7 and 7n are controlled so that the shift amount is controlled by the output of the level detector 2.

That is, the input signal sequence is subjected to windowing processing, divided into frames having n sample values, and digitally converted.The level detector 2 detects the maximum value of the signal amplitude included in the frame, and Based on this detection output, gain adjustment is performed by performing a focus shift by a preset number of shifts corresponding to the blocks divided according to the signal amplitude.

In the above example, if the optimal value for fast Fourier transform processing is 2000 to 4000 (hexadecimal), the human input signal is The relationship between the value and the number of shifts may be set as shown in FIG. 4, and the gain may be adjusted.

In the gain adjustment example shown in FIG. 4, overflow can be prevented when the gain is adjusted for the first block, and an improvement in S/N can be expected when the gain is adjusted for the third to fifth blocks.

〔Effect of the invention〕

According to the present invention described above, the gain can be adjusted without performing division in the DSP, and the number of processing cycles can be significantly reduced.

Further, since the bit shift value can be arbitrarily set for each block, it is possible to achieve the effect that nonlinear gain adjustment can be performed according to the dynamic range of the input signal.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining the principle of the present invention, FIG. 2 is a diagram for explaining a shift example in the present invention, FIG. 3 is a block diagram of a digital delay equalizer to which the present invention is applied, and FIG. 4 is a diagram for explaining a shift example in the present invention. It is a figure which shows the relationship between the input signal value and the number of shifts in an Example.

Claims (1)

[Claims] In an automatic gain adjustment method using a digital signal processor, the dynamic range of a signal input to the digital signal processor is divided into a plurality of blocks, and
The number of shifts is set in advance for each of these blocks, the maximum amplitude value included in the frame formed by applying windowing processing to the input signal sequence is detected, and the block to which the maximum value belongs is detected. An automatic gain adjustment method using a digital signal processor, characterized in that all samples in the frame are bit-shifted by a preset number of shifts corresponding to the above.